arch/x86/postcar_loader.c: Change prepare_and_run_postcar signature
The postcar frame can now be a local variable to that function.
Change-Id: I873298970fff76b9ee1cae7da156613eb557ffbc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61964
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
diff --git a/src/arch/x86/include/arch/romstage.h b/src/arch/x86/include/arch/romstage.h
index 5951766..d637d19 100644
--- a/src/arch/x86/include/arch/romstage.h
+++ b/src/arch/x86/include/arch/romstage.h
@@ -43,7 +43,7 @@
* prepare_and_run_postcar() determines the stack to use after
* cache-as-ram is torn down as well as the MTRR settings to use.
*/
-void prepare_and_run_postcar(struct postcar_frame *pcf);
+void prepare_and_run_postcar(void);
/*
* Systems without a native coreboot cache-as-ram teardown may implement
diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c
index b5bfe3e..af8152d 100644
--- a/src/arch/x86/postcar_loader.c
+++ b/src/arch/x86/postcar_loader.c
@@ -21,6 +21,8 @@
static int postcar_frame_init(struct postcar_frame *pcf)
{
+ memset(pcf, 0, sizeof(*pcf));
+
struct var_mtrr_context *ctx;
ctx = cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, var_mtrr_ctx_size());
@@ -61,16 +63,18 @@
/* prepare_and_run_postcar() determines the stack to use after
* cache-as-ram is torn down as well as the MTRR settings to use. */
-void prepare_and_run_postcar(struct postcar_frame *pcf)
+void prepare_and_run_postcar(void)
{
- if (postcar_frame_init(pcf))
+ struct postcar_frame pcf;
+
+ if (postcar_frame_init(&pcf))
die("Unable to initialize postcar frame.\n");
- fill_postcar_frame(pcf);
+ fill_postcar_frame(&pcf);
- postcar_frame_common_mtrrs(pcf);
+ postcar_frame_common_mtrrs(&pcf);
- run_postcar_phase(pcf);
+ run_postcar_phase(&pcf);
/* We do not return here. */
}
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index 85bc894..a307893 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -14,8 +14,6 @@
following as a guideline for acceptable stack usage. */
#define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000
-static struct postcar_frame early_mtrrs;
-
static void romstage_main(void)
{
int i;
@@ -54,7 +52,7 @@
if (CONFIG(SMM_TSEG))
smm_list_regions();
- prepare_and_run_postcar(&early_mtrrs);
+ prepare_and_run_postcar();
/* We do not return here. */
}
diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c
index 9abcdd6..35b2778 100644
--- a/src/drivers/amd/agesa/romstage.c
+++ b/src/drivers/amd/agesa/romstage.c
@@ -33,7 +33,6 @@
static void romstage_main(void)
{
- struct postcar_frame pcf;
struct sysinfo romstage_state;
struct sysinfo *cb = &romstage_state;
int cbmem_initted = 0;
@@ -78,7 +77,7 @@
romstage_handoff_init(cb->s3resume);
- prepare_and_run_postcar(&pcf);
+ prepare_and_run_postcar();
/* We do not return. */
}
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index aa54aee..b7731b0 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -50,7 +50,6 @@
asmlinkage void car_stage_entry(void)
{
- struct postcar_frame pcf;
msr_t base, mask;
msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
int vmtrrs = mtrr_cap.lo & MTRR_CAP_VCNT;
@@ -121,7 +120,7 @@
smm_list_regions();
post_code(0x44);
- prepare_and_run_postcar(&pcf);
+ prepare_and_run_postcar();
}
void fill_postcar_frame(struct postcar_frame *pcf)