# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only

config SOUTHBRIDGE_INTEL_I82801GX
	bool
	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
	select IOAPIC
	select USE_WATCHDOG_ON_BOOT
	select HAVE_SMI_HANDLER
	select COMMON_FADT
	select SOUTHBRIDGE_INTEL_COMMON_GPIO
	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
	select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 if BOOT_DEVICE_SPI_FLASH
	select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
	select SOUTHBRIDGE_INTEL_COMMON_PMBASE
	select HAVE_INTEL_CHIPSET_LOCKDOWN
	select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
	select INTEL_HAS_TOP_SWAP
	select SOUTHBRIDGE_INTEL_COMMON_SMM
	select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
	select SOUTHBRIDGE_INTEL_COMMON_RTC
	select SOUTHBRIDGE_INTEL_COMMON_RESET
	select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG

if SOUTHBRIDGE_INTEL_I82801GX

config EHCI_BAR
	hex
	default 0xfef00000

config HPET_MIN_TICKS
	hex
	default 0x80

config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
	hex
	# Always 64K, all other options are invalid
	default 0x10000

endif