| commit | 7e9de01c4758cc1e8adb05d0c443701495e98fe0 | [log] [tgz] |
|---|---|---|
| author | Florian Zumbiehl <florz@florz.de> | Tue Nov 01 20:17:12 2011 +0100 |
| committer | Patrick Georgi <patrick@georgi-clan.de> | Mon Nov 07 11:40:55 2011 +0100 |
| tree | 7309778741f5ab74fb7c034a40245008c716a3bf | |
| parent | 643c9e892fab5f73dde566b9ffb73f2f0463d9a7 [diff] |
Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26 Change-Id: Ic77854130ad43715daa7c0eb462291db48df9f84 Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/370 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>