soc/intel/mtl: Hook up ECT FSP UPD
Hook up ECT FSP UPD for Intel MeteorLake.
BUG=b:243734885
TEST=Built and booted on Google Rex. Verified the UPD value in MRC log.
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: Idc23717c3ce52e3635e2da41733058f912545e5f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67051
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maulik Vaghela <maulikvaghela@google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
diff --git a/src/soc/intel/meteorlake/meminit.c b/src/soc/intel/meteorlake/meminit.c
index f2b7a09..4fdbdb2 100644
--- a/src/soc/intel/meteorlake/meminit.c
+++ b/src/soc/intel/meteorlake/meminit.c
@@ -196,6 +196,7 @@
bool dq_dqs_auto_detect = false;
FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig;
+ mem_cfg->ECT = mb_cfg->ect;
mem_cfg->UserBd = mb_cfg->UserBd;
set_rcomp_config(mem_cfg, mb_cfg);