intelblocks/pep: Handle TBT displays on s0ix transition
Notify IOM to enable or disable TBT displays on S0ix exit and entry
respectively.
Change-Id: I9f49d8e30fe8e8b335128e53d71ef902328f031a
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/soc/intel/common/block/acpi/pep.c b/src/soc/intel/common/block/acpi/pep.c
index 1399438..8028b81 100644
--- a/src/soc/intel/common/block/acpi/pep.c
+++ b/src/soc/intel/common/block/acpi/pep.c
@@ -17,6 +17,8 @@
#define MAINBOARD_DISPLAY_HOOK "\\_SB.MDSX"
#define ENABLE_PM_BITS_HOOK "\\_SB.PCI0.EGPM"
#define RESTORE_PM_BITS_HOOK "\\_SB.PCI0.RGPM"
+#define THUNDERBOLT_DEVICE "\\_SB.PCI0.TXHC"
+#define THUNDERBOLT_IOM_DPOF "\\_SB.PCI0.DPOF"
#define LPI_STATES_ALL 0xff
#define MIN_DEVICE_STATE ACPI_DEVICE_SLEEP_D0
#define PEPD_SCOPE "\\_SB.PCI0"
@@ -129,6 +131,11 @@
acpigen_write_if_cond_ref_of(ENABLE_PM_BITS_HOOK);
acpigen_emit_namestring(ENABLE_PM_BITS_HOOK);
acpigen_write_if_end();
+
+ /* Handle Thunderbolt displays */
+ acpigen_write_if_cond_ref_of(THUNDERBOLT_DEVICE);
+ acpigen_write_store_int_to_namestr(1, THUNDERBOLT_IOM_DPOF);
+ acpigen_write_if_end();
}
static void lpi_s0ix_exit(void *unused)
@@ -149,6 +156,11 @@
acpigen_write_if_cond_ref_of(RESTORE_PM_BITS_HOOK);
acpigen_emit_namestring(RESTORE_PM_BITS_HOOK);
acpigen_write_if_end();
+
+ /* Handle Thunderbolt displays */
+ acpigen_write_if_cond_ref_of(THUNDERBOLT_DEVICE);
+ acpigen_write_store_int_to_namestr(0, THUNDERBOLT_IOM_DPOF);
+ acpigen_write_if_end();
}
static void lpi_display_on(void *unused)