commit | 859305d45762d8499b4100765d3a7bd954038c73 | [log] [tgz] |
---|---|---|
author | Werner Zeh <werner.zeh@siemens.com> | Thu May 19 10:01:37 2022 +0200 |
committer | Felix Held <felix-coreboot@felixheld.de> | Tue May 24 13:45:15 2022 +0000 |
tree | 243eac3ff3a09f27f5d9f43c561562266f2d3db9 | |
parent | 5c808e03e2d80edd9ecd6a2a9268152b477940b6 [diff] |
soc/intel/apollolake: Measure bootblock from IFWI On Apollo Lake the bootblock is stitched into the IBBL IFWI region at build time. At execution time TXE loads this IBBL into a shared SRAM (which is read-only in this phase) and maps it at 4 GiB - 32 KiB. Then the CPU starts to operate from this shared SRAM as it were flash space. In order to provide a reliable CRTM init, the real executed bootblock code needs to be measured into TPM if VBOOT is selected. This patch adds the needed code to do this. Change-Id: Ifb3f798de638a85029ebfe0d1b65770029297db3 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64493 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.