mb/ocp/deltalake: Revert OVERRIDE_UART_FOR_CONSOLE
This reverts commit f6efeae66c (mb/ocp/deltalake: Override uart base
address via VPD variable). Both SOL and UART would use 0x2f8,
disabling it can also avoid searching flash VPD during each UART tx.
Change-Id: I453fdddbb883eb956bac708913c17bb581f75b9d
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/mainboard/ocp/deltalake/Kconfig b/src/mainboard/ocp/deltalake/Kconfig
index dbf4a2e..74212f9 100644
--- a/src/mainboard/ocp/deltalake/Kconfig
+++ b/src/mainboard/ocp/deltalake/Kconfig
@@ -16,7 +16,6 @@
select IPMI_OCP
select MEMORY_MAPPED_TPM
select MAINBOARD_HAS_TPM2
- select OVERRIDE_UART_FOR_CONSOLE
config UART_FOR_CONSOLE
int
diff --git a/src/mainboard/ocp/deltalake/Makefile.inc b/src/mainboard/ocp/deltalake/Makefile.inc
index 08db2c7..245a6d6 100644
--- a/src/mainboard/ocp/deltalake/Makefile.inc
+++ b/src/mainboard/ocp/deltalake/Makefile.inc
@@ -8,5 +8,4 @@
ramstage-y += ramstage.c ipmi.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
all-$(CONFIG_CONSOLE_OVERRIDE_LOGLEVEL) += loglevel_vpd.c
-all-$(CONFIG_OVERRIDE_UART_FOR_CONSOLE) += uartio_vpd.c
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c
index 2efed1c..23bbffe 100644
--- a/src/mainboard/ocp/deltalake/romstage.c
+++ b/src/mainboard/ocp/deltalake/romstage.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
-#include <console/uart.h>
#include <drivers/ipmi/ipmi_if.h>
#include <drivers/ipmi/ocp/ipmi_ocp.h>
#include <drivers/vpd/vpd.h>
@@ -60,10 +59,7 @@
"SerialIoUartDebugEnable to %d\n", FSP_LOG, FSP_LOG_DEFAULT);
mupd->FspmConfig.SerialIoUartDebugEnable = FSP_LOG_DEFAULT;
}
-
- /* Select UART IO of FSP */
- static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
- mupd->FspmConfig.SerialIoUartDebugIoBase = bases[get_uart_for_console()];
+ mupd->FspmConfig.SerialIoUartDebugIoBase = 0x2f8;
if (mupd->FspmConfig.SerialIoUartDebugEnable) {
/* FSP debug log level */
diff --git a/src/mainboard/ocp/deltalake/uartio_vpd.c b/src/mainboard/ocp/deltalake/uartio_vpd.c
deleted file mode 100644
index 4c2d876..0000000
--- a/src/mainboard/ocp/deltalake/uartio_vpd.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <drivers/vpd/vpd.h>
-#include <console/uart.h>
-
-#include "vpd.h"
-
-unsigned int get_uart_for_console(void)
-{
- int val_int = COREBOOT_UART_IO_DEFAULT;
-
- if (vpd_get_int(COREBOOT_UART_IO, VPD_RW_THEN_RO, (int *const) &val_int)) {
- if (val_int > 3)
- val_int = COREBOOT_UART_IO_DEFAULT;
- }
- return val_int;
-}
diff --git a/src/mainboard/ocp/deltalake/vpd.h b/src/mainboard/ocp/deltalake/vpd.h
index fb33ef2..f927134 100644
--- a/src/mainboard/ocp/deltalake/vpd.h
+++ b/src/mainboard/ocp/deltalake/vpd.h
@@ -37,10 +37,6 @@
#define FSPM_MEMREFRESHWATERMARK "fspm_mem_refresh_watermark"
#define FSPM_MEMREFRESHWATERMARK_DEFAULT 1
-/* coreboot uart io select: 0 = 0x3f8, 1 = 0x2f8, 2 = 0x3e8, 3 = 0x2e8 */
-#define COREBOOT_UART_IO "coreboot_uart_io"
-#define COREBOOT_UART_IO_DEFAULT 1
-
/* FSP dimm frequency limit, 0:Auto, 1:DDR_1333, 2:DDR_1600, 3:DDR_1866, 4:DDR_2133,
* 5:DDR_2400, 6:DDR_2666, 7:DDR_2933, 8:DDR_3200 */
#define FSP_DIMM_FREQ "fsp_dimm_freq"