tree dd47ee00fec630bf7655a4756027ffc8be873d40
parent 6d03f8986d0498d04fcf304cb247a60ef506d540
author Subrata Banik <subratabanik@google.com> 1674198238 +0530
committer Felix Held <felix-coreboot@felixheld.de> 1674347559 +0000

soc/intel/apollolake: Add PMC macros for common code usage

This patch adds new macros (i.e. SUS Power Failure and Power Failure)
from the APL EDS vol 1 (doc 569262) to be able to implement common
code API to clear the power failure status bits.

Note: as per the EDS those newly added power management failure bits
are RO and shouldn't change any functionality of the existing APL SoC
code. The reason behind adding those macro definitions is to fix the
compilation issue due to code change targeted for the Intel SKL and
Xeon-SP.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I0bbf11ada2b2f8735173be69ad157b8055021126
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72130
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>