| commit | 8475f2d0c554a67741824a4a9d84ddc0c31a0778 | [log] [tgz] |
|---|---|---|
| author | Lee Leahy <leroy.p.leahy@intel.com> | Thu Sep 17 11:53:27 2015 -0700 |
| committer | Aaron Durbin <adurbin@gmail.com> | Sun Oct 11 23:58:34 2015 +0000 |
| tree | afc4f51f9d9688168de5697a371a784db790b7f8 | |
| parent | f45eb062da5a78425d52732b0a0a988b30457c24 [diff] |
skylake: Leave SPI controller enabled Leave the SPI controller enabled upon boot block exit. BRANCH=none BUG=chrome-os-partner:44827 TEST=Build and run on kunimitsu Change-Id: I5b10d7cc8d5d350282206abe6a945bab66f97ada Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: http://review.coreboot.org/11825 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>