commit 8429de75a6cd6c6fbc13e0b85cbe9fba49dad211
author Loïc Grenié <loic.grenie@gmail.com> Mon Nov 02 15:01:49 2009 +0000
committer Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Mon Nov 02 15:01:49 2009 +0000
tree 9deb9123452d24149e0c3209df0da7c17546c42a
parent ba49fb76a51ddb3c27e7c4c9873e75bf8687a73c

Add 82Q35/P35/Q33/G33/G31/P31 support to inteltool.
The registers are (as far as I can tell) unchanged with respect to those
of the PM965.

Signed-off-by: Loïc Grenié <loic.grenie@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

util/inteltool/pcie.c

diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c
index 3a31ae4..bcb7f96 100644
--- a/util/inteltool/pcie.c
+++ b/util/inteltool/pcie.c
@@ -39,6 +39,9 @@
 		epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
 		break;
  	case PCI_DEVICE_ID_INTEL_PM965:
+ 	case PCI_DEVICE_ID_INTEL_82Q35:
+ 	case PCI_DEVICE_ID_INTEL_82G33:
+ 	case PCI_DEVICE_ID_INTEL_82Q33:
  		epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
  		epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32;
  		break;
@@ -86,6 +89,9 @@
 		dmibar_phys = pci_read_long(nb, 0x4c) & 0xfffffffe;
 		break;
  	case PCI_DEVICE_ID_INTEL_PM965:
+ 	case PCI_DEVICE_ID_INTEL_82Q35:
+ 	case PCI_DEVICE_ID_INTEL_82G33:
+ 	case PCI_DEVICE_ID_INTEL_82Q33:
  		dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe;
  		dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32;
  		break;
@@ -135,6 +141,9 @@
 		pciexbar_reg = pci_read_long(nb, 0x48);
 		break;
  	case PCI_DEVICE_ID_INTEL_PM965:
+ 	case PCI_DEVICE_ID_INTEL_82Q35:
+ 	case PCI_DEVICE_ID_INTEL_82G33:
+ 	case PCI_DEVICE_ID_INTEL_82Q33:
  		pciexbar_reg = pci_read_long(nb, 0x60);
  		pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32;
  		break;