oprom: Fix for 64bit
Change-Id: If4c1ab5ae33a64be3e7b14150d410edd291ee4ed
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10591
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c
index 485d1a4..14bcbc0 100644
--- a/src/device/oprom/realmode/x86.c
+++ b/src/device/oprom/realmode/x86.c
@@ -188,7 +188,7 @@
for (i = 0; i < 256; i++) {
idts[i].cs = 0;
idts[i].offset = 0x1000 + (i * __idt_handler_size);
- write_idt_stub((void *)((u32 )idts[i].offset), i);
+ write_idt_stub((void *)((uintptr_t)idts[i].offset), i);
}
/* Many option ROMs use the hard coded interrupt entry points in the
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index 26cd6cf..80b2a51 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -57,7 +57,7 @@
printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n",
dev_path(dev), rom_header);
} else {
- u32 rom_address;
+ uintptr_t rom_address;
rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);