diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 6236ebd..4e2f9f9 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -331,8 +331,7 @@
 	RCBA32(CG) = reg32;
 }
 
-#if CONFIG(HAVE_SMI_HANDLER)
-static void i82801gx_lock_smm(struct device *dev)
+static void i82801gx_set_acpi_mode(struct device *dev)
 {
 	if (!acpi_is_wakeup_s3()) {
 #if ENABLE_ACPI_MODE_IN_COREBOOT
@@ -349,7 +348,6 @@
 		outb(APM_CNT_ACPI_ENABLE, APM_CNT);
 	}
 }
-#endif
 
 #define SPIBASE 0x3020
 static void i82801gx_spi_init(void)
@@ -415,9 +413,8 @@
 	/* Interrupt 9 should be level triggered (SCI) */
 	i8259_configure_irq_trigger(9, 1);
 
-#if CONFIG(HAVE_SMI_HANDLER)
-	i82801gx_lock_smm(dev);
-#endif
+	if (CONFIG(HAVE_SMI_HANDLER))
+		i82801gx_set_acpi_mode(dev);
 
 	i82801gx_spi_init();