rk3288: add cpu and chip
BUG=chrome-os-partner:29778
TEST=Build coreboot
Change-Id: I4c1864171e56a81e8eda95a15ca6a6bc1adc7a70
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 814af4b653432295cb6d7222af4a6e5a8d9dfbf6
Original-Change-Id: I1a986fbc8b3737bae655207dd89865dd39aecf87
Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209467
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: http://review.coreboot.org/8866
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
diff --git a/src/soc/rockchip/rk3288/chip.h b/src/soc/rockchip/rk3288/chip.h
new file mode 100755
index 0000000..a7fded0
--- /dev/null
+++ b/src/soc/rockchip/rk3288/chip.h
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __SOC_ROCKCHIP_RK3288_CHIP_H__
+#define __SOC_ROCKCHIP_RK3288_CHIP_H__
+
+struct soc_rockchip_rk3288_config {
+ int screen_type;
+ int lvds_format;
+ int out_face;
+ int clock_frequency;
+ int hactive;
+ int vactive;
+ int hback_porch;
+ int hfront_porch;
+ int vback_porch;
+ int vfront_porch;
+ int hsync_len;
+ int vsync_len;
+ int hsync_active;
+ int vsync_active;
+ int de_active;
+ int pixelclk_active;
+ int swap_rb;
+ int swap_rg;
+ int swap_gb;
+ int lcd_en_gpio;
+ int lcd_cs_gpio;
+};
+
+#endif /* __SOC_ROCKCHIP_RK3288_CHIP_H__ */