| commit | 82b7d0cf8c426b98ac8a737531f053585f7d4a58 | [log] [tgz] |
|---|---|---|
| author | Cliff Huang <cliff.huang@intel.corp-partner.google.com> | Mon Apr 11 18:49:57 2022 -0700 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Thu Jun 16 00:00:03 2022 +0000 |
| tree | 64579fee1a33e7c599e6cc1275bd514bd3b50752 | |
| parent | ca741055e6b63b6722ad9837fa5360fa6b5b3e5b [diff] |
mb/intel/adlrvp: Add 5G WWAN ACPI support for ADL-P RVP Add FM350GL 5G WWAN support using drivers/wwan/fm and additional PM features from RTD3. PCIe root port: 6 (1 based) clock source & request: 5 (0 based) GPIOs: WWAN_PERST_N: GPPC_C5 WWAN_RST_N: GPPC_F14 WWAN_FCP_OFF_N: GPPC_F15 WWAN_WAKE_N: GPPC_D18 WWAN_PWREN: GPPC_F21 WWAN_DISABLE_N: GPPC_D15 CLKREQ5_WWAN_N: GPPC_H23 TEST=Check SSDT table to see if the PXSX device and PowerResource RTD3 are generated under the root port. BRANCH=firmware-brya-14505.B Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: I10902245e3a5e05cd2af9030394933e936c25396 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63941 Reviewed-by: Jeremy Compostella <jeremy.compostella@intel.corp-partner.google.com> Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.