nb/intel/sandybridge: Factor out timing tables
The timing tables for Sandy Bridge are a subset of Ivy Bridge's tables.
Move the latter to a common place, and use it for both generations.
Tested on Asus P8Z77-V LX2 with an i7-2600 and an i5-3330, both work.
Change-Id: Id14227febf4eebb8a2b4d2d4f37759d0f42648c6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39735
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/sandybridge/raminit_tables.h b/src/northbridge/intel/sandybridge/raminit_tables.h
index 4e22555..e5cf589b 100644
--- a/src/northbridge/intel/sandybridge/raminit_tables.h
+++ b/src/northbridge/intel/sandybridge/raminit_tables.h
@@ -6,6 +6,26 @@
#include <types.h>
+extern const u32 frq_refi_map[2][8];
+
+extern const u8 frq_xs_map[2][8];
+
+extern const u8 frq_mod_map[2][8];
+
+extern const u8 frq_wlo_map[2][8];
+
+extern const u8 frq_cke_map[2][8];
+
+extern const u8 frq_xpdll_map[2][8];
+
+extern const u8 frq_xp_map[2][8];
+
+extern const u8 frq_aonpd_map[2][8];
+
+extern const u32 frq_comp2_map[2][8];
+
+
+
extern const u32 pattern[32][16];
extern const u8 use_base[63][32];