soc/intel/common/irq: Add function to program north PCI IRQs
Because the FSP interface for PCI IRQs only includes the PCH devices,
this function is the complement to that, taking the list of irq entries,
and programming the PCI_INTERRUPT_LINE registers.
BUG=b:130217151, b:171580862, b:176858827
TEST=boot brya with patch train, verify with `lspci -vvv` that for all
the north PCI devices, their IRQ was either the one programmed by this
function, or an MSI was used.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I81cf7b25f115e41deb25767669b5466b5712b177
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55817
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/common/block/irq/irq.c b/src/soc/intel/common/block/irq/irq.c
index eb4daf9..96fd733 100644
--- a/src/soc/intel/common/block/irq/irq.c
+++ b/src/soc/intel/common/block/irq/irq.c
@@ -4,9 +4,11 @@
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_def.h>
+#include <device/pci_ops.h>
#include <intelblocks/gpio.h>
#include <intelblocks/irq.h>
#include <intelblocks/lpc_lib.h>
+#include <soc/pci_devs.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <stdlib.h>
#include <string.h>
@@ -394,3 +396,20 @@
intel_write_pci0_PRT(pin_irq_map, map_count, &pirq_map);
free(pin_irq_map);
}
+
+void irq_program_non_pch(const struct pci_irq_entry *entries)
+{
+ while (entries) {
+ if (PCI_SLOT(entries->devfn) >= MIN_PCH_SLOT) {
+ entries = entries->next;
+ continue;
+ }
+
+ if (entries->irq)
+ pci_s_write_config8(PCI_DEV(0, PCI_SLOT(entries->devfn),
+ PCI_FUNC(entries->devfn)),
+ PCI_INTERRUPT_LINE, entries->irq);
+
+ entries = entries->next;
+ }
+}