soc/amd: Define post codes

For the most part, this doesn't change any post codes, simply making the
existing post-codes into macros.

picasso/romstage.c did get a couple of post codes removed to match the
other files.

The POST_ROMSTAGE and POST_BOOTBLOCK codes are intended to become global
at some point, while the POST_AGESA and POST_PSP codes would stay AMD
specific.

Change-Id: I007a09b6a3ed3280bac674cd74e298ec5c408ab7
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69867
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/soc/amd/common/block/cpu/car/cache_as_ram.S b/src/soc/amd/common/block/cpu/car/cache_as_ram.S
index 251e23a..b38ce80 100644
--- a/src/soc/amd/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/amd/common/block/cpu/car/cache_as_ram.S
@@ -8,6 +8,7 @@
  ******************************************************************************
  */
 
+#include <amdblocks/post_codes.h>
 #include <cpu/x86/post_code.h>
 
 .section .init
@@ -27,7 +28,7 @@
 .global bootblock_pre_c_entry
 bootblock_pre_c_entry:
 
-	post_code(0xa0)
+	post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
 
 	AMD_ENABLE_STACK
 
@@ -41,7 +42,7 @@
 	pushl	%eax		/* tsc[31:0] */
 
 before_carstage:
-	post_code(0xa2)
+	post_code(POST_BOOTBLOCK_PRE_C_DONE)
 
 	call	bootblock_c_entry
 	/* Never reached */
diff --git a/src/soc/amd/common/block/cpu/noncar/pre_c.S b/src/soc/amd/common/block/cpu/noncar/pre_c.S
index 503de3b..e123c36 100644
--- a/src/soc/amd/common/block/cpu/noncar/pre_c.S
+++ b/src/soc/amd/common/block/cpu/noncar/pre_c.S
@@ -1,12 +1,13 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <amdblocks/post_codes.h>
 #include <cpu/x86/post_code.h>
 
 .section .init, "ax", @progbits
 
 .global bootblock_resume_entry
 bootblock_resume_entry:
-	post_code(0xb0)
+	post_code(POST_BOOTBLOCK_RESUME_ENTRY)
 
 	/* Get an early timestamp */
 	rdtsc
@@ -23,7 +24,7 @@
 
 .global bootblock_pre_c_entry
 bootblock_pre_c_entry:
-	post_code(0xa0)
+	post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
 
 #if ENV_X86_64
 	#include <cpu/x86/64bit/entry64.inc>
@@ -56,7 +57,7 @@
 	pushl	%eax		/* tsc[31:0] */
 #endif
 
-	post_code(0xa2)
+	post_code(POST_BOOTBLOCK_PRE_C_DONE)
 
 	call	bootblock_c_entry
 	/* Never reached */