| commit | 8120759d90f7e5164a600f21bdd04b8878ba8259 | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Tue Aug 28 20:37:58 2018 +0200 |
| committer | Martin Roth <martinroth@google.com> | Thu Aug 30 14:47:41 2018 +0000 |
| tree | 1bb6ad18fc2c5fe5d299789b822363e8ad2e54b5 | |
| parent | 0805cbe6ae37e563dadaae2e9c01f4ca383393fb [diff] |
Documentation/nb/intel/sandybridge/nri_registers.md: Fix mistake According to a comment on fa1a07b, the 100MHz clock is the Ivy Bridge only clock, not the 133MHz one. Change-Id: I28fed4a9264b96f93b9e88325f547a5db512514c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28377 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>