intel i945 gm45 x4x: Apply cbmem_top() alignment
Force modest 4 MiB alignment to help with MTRR assignment.
Change-Id: I49a7d1288bc079da1b8bd52150ddcfcfe2e51179
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17780
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c
index 39ede5f7..d962cc3 100644
--- a/src/northbridge/intel/i945/ram_calc.c
+++ b/src/northbridge/intel/i945/ram_calc.c
@@ -54,9 +54,14 @@
return tom;
}
+/* Depending of UMA and TSEG configuration, TSEG might start at any
+ * 1 MiB aligment. As this may cause very greedy MTRR setup, push
+ * CBMEM top downwards to 4 MiB boundary.
+ */
void *cbmem_top(void)
{
- return (void *) smm_region_start();
+ uintptr_t top_of_ram = ALIGN_DOWN(smm_region_start(), 4*MiB);
+ return (void *) top_of_ram;
}
/** Decodes used Graphics Mode Select (GMS) to kilobytes. */