drivers/generic/bayhub_lv2: move the driver to ".enable"
coreboot sets up certain configs (e.g. L1ss) based on the device's
reported capacities; however, this BayHub lv2 driver modifies some
of its capacities after coreboot uses them. Therefore, coreboot may
make incorrect configs based on out-of-date capacities.
This patch moves the driver from ".init" to ".enable" so that the
capacities are set before the rest of coreboot queries them.
BUG=b:177955523
BRANCH=zork
TEST="lspci -vvvv" reported "PCI-PM_L1.2-" and "ASPM_L1.2-" on L1SubCtl1
of both PCI device "00:01.3" and "02.00.0"
Signed-off-by: Victor Ding <victording@google.com>
Change-Id: I857b7c7c6732bbd26de561052affa3a3e7e25737
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/drivers/generic/bayhub_lv2/lv2.c b/src/drivers/generic/bayhub_lv2/lv2.c
index 9e9f074..814cfb6 100644
--- a/src/drivers/generic/bayhub_lv2/lv2.c
+++ b/src/drivers/generic/bayhub_lv2/lv2.c
@@ -11,7 +11,7 @@
#include "chip.h"
#include "lv2.h"
-static void lv2_init(struct device *dev)
+static void lv2_enable(struct device *dev)
{
struct drivers_generic_bayhub_lv2_config *config = dev->chip_info;
pci_dev_init(dev);
@@ -50,7 +50,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.ops_pci = &pci_dev_ops_pci,
- .init = lv2_init,
+ .enable = lv2_enable,
};
static const unsigned short pci_device_ids[] = {