soc/amd/genoa: configure FCH IRQ mapping
Add the code to configure the FCH IRQ mapping registers and provide the
IRQ name strings for each FCH IRQ mapping configuration register.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I282ae35ebc4d7754121ce4544b782e3cbe7e2256
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa/Kconfig
index 6cb4a8a..f780e06 100644
--- a/src/soc/amd/genoa/Kconfig
+++ b/src/soc/amd/genoa/Kconfig
@@ -28,6 +28,7 @@
select SOC_AMD_COMMON_BLOCK_LPC
select SOC_AMD_COMMON_BLOCK_MCAX
select SOC_AMD_COMMON_BLOCK_NONCAR
+ select SOC_AMD_COMMON_BLOCK_PCI
select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
select SOC_AMD_COMMON_BLOCK_PSP_GEN2
select SOC_AMD_COMMON_BLOCK_PSP_SPL