commit | 8021b474fb83c201e3d8d9fbc82ef8d5d9ac4a54 | [log] [tgz] |
---|---|---|
author | Karthikeyan Ramasubramanian <kramasub@google.com> | Tue Jun 16 23:54:46 2020 -0600 |
committer | Patrick Georgi <pgeorgi@google.com> | Thu Jun 18 08:33:03 2020 +0000 |
tree | e7cbf1002ad703dd018b946e5d3a5935ea2a9322 | |
parent | 203af604644abc156acac61da3fe8c280639cd3a [diff] |
soc/intel/jasperlake: Enable FSP-S compression Use LZ4 compression technique to compress FSP-S. This provides some SPI ROM space savings(~60 KiB) in each CBFS. FSP-M is XIP and hence not compressed. LZ4 is chosen over LZMA since the decompression saves ~50 ms for an extra overhead of ~1.5 KiB. LZ4 Compression: fsps.bin 0xa9fc0 fsp 203423 LZ4 (262144 decompressed) LZ4 Decompression: 17:starting LZ4 decompress (ignore for x86) 433,550 (1,154) 18:finished LZ4 decompress (ignore for x86) 461,620 (28,069) LZMA Compression: fsps.bin 0xa9fc0 fsp 202132 LZMA (262144 decompressed) LZMA Decompression: 15:starting LZMA decompress (ignore for x86) 478,448 (1,174) 16:finished LZMA decompress (ignore for x86) 557,725 (79,277) BUG=b:158034451 TEST=Build and boot waddledoo mainboard. Change-Id: I416b1d91d7f4836b1e9c641b0fe07b39876364ba Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42445 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.