This patch implements MBI (modular bios interface) support to the i830 chipset.
This is needed on the IP1000T to get VGA output. The VGA option rom will ask
through an SMI for hardware specifics (in form of a VBT, video bios table)
which the SMI handler copies into the VGA option rom.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/mainboard/thomson/ip1000/devicetree.cb b/src/mainboard/thomson/ip1000/devicetree.cb
index f38c1c3..a3ee26c 100644
--- a/src/mainboard/thomson/ip1000/devicetree.cb
+++ b/src/mainboard/thomson/ip1000/devicetree.cb
@@ -1,4 +1,10 @@
chip northbridge/intel/i82830 # Northbridge
+ device apic_cluster 0 on # APIC cluster
+ chip cpu/intel/socket_PGA370 # Low Voltage PIII Micro-FCBGA Socket 479
+ device apic 0 on end # APIC
+ end
+ end
+
device pci_domain 0 on # PCI domain
device pci 0.0 on end # Host bridge
device pci 2.0 on end # VGA (Intel 82830 CGC)
@@ -19,9 +25,7 @@
device pci 1d.1 on end # USB UHCI Controller #2
device pci 1d.2 on end # USB UHCI Controller #3
device pci 1d.7 on end # USB2 EHCI Controller
- device pci 1e.0 on # PCI bridge
- device pci 08.0 on end # Intel 82801DB PRO/100 VE Ethernet
- end
+ device pci 1e.0 on end # PCI bridge
device pci 1f.0 on # ISA/LPC bridge
chip superio/smsc/smscsuperio # Super I/O
device pnp 2e.0 off # Floppy
@@ -61,10 +65,5 @@
device pci 1f.6 off end # AC'97 modem
end
end
- device apic_cluster 0 on # APIC cluster
- chip cpu/intel/socket_PGA370 # Low Voltage PIII Micro-FCBGA Socket 479
- device apic 0 on end # APIC
- end
- end
end