device/device.h: Rename busses for clarity
This renames bus to upstream and link_list to downstream.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index 266d75c..66ec824 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -171,8 +171,8 @@
reg_var[0] = pci_read_config16(dev, 0x64);
struct device *child;
- if (dev->link_list) {
- for (child = dev->link_list->children; child; child = child->sibling) {
+ if (dev->downstream) {
+ for (child = dev->downstream->children; child; child = child->sibling) {
if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
for (res = child->resource_list; res; res = res->next) {
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 13f16f8..a1dd16e 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -145,8 +145,8 @@
* must be a static device from devicetree.cb.
* If one is found assume it's an integrated device and not a PCIe slot.
*/
- if (dev->link_list)
- child = pcidev_path_behind(dev->link_list, PCI_DEVFN(0, 0));
+ if (dev->downstream)
+ child = pcidev_path_behind(dev->downstream, PCI_DEVFN(0, 0));
/* Set slot power limit as configured above */
reg32 = pci_read_config32(dev, cap + PCI_EXP_SLTCAP);