device/device.h: Rename busses for clarity
This renames bus to upstream and link_list to downstream.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 469b9be..15780d0 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -478,7 +478,7 @@
return;
}
/* Only disable bus 0 devices. */
- for (dev = dev->bus->children; dev; dev = dev->sibling) {
+ for (dev = dev->upstream->children; dev; dev = dev->sibling) {
if (!dev->enabled)
disable_dev(dev, silconfig);
}
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index a0df97c..2e37280 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -117,7 +117,7 @@
continue;
current_bdf = irq_dev->path.pci.devfn |
- irq_dev->bus->secondary << 8;
+ irq_dev->upstream->secondary << 8;
/*
* Step 1: Get the INT_PIN and device structure to look for
@@ -132,7 +132,7 @@
original_int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN);
parent_bdf = targ_dev->path.pci.devfn
- | targ_dev->bus->secondary << 8;
+ | targ_dev->upstream->secondary << 8;
device_num = PCI_SLOT(parent_bdf);
if (ir->pcidev[device_num] == 0) {
diff --git a/src/soc/intel/common/block/acpi/pep.c b/src/soc/intel/common/block/acpi/pep.c
index 39f9542..a6ae454 100644
--- a/src/soc/intel/common/block/acpi/pep.c
+++ b/src/soc/intel/common/block/acpi/pep.c
@@ -144,7 +144,7 @@
case DEVICE_PATH_PCI:
/* skip external buses*/
- if ((dev->bus->secondary != 0) || (!states_arr))
+ if ((dev->upstream->secondary != 0) || (!states_arr))
return ACPI_DEVICE_SLEEP_NONE;
for (size_t i = 0; i < size; i++)
if (states_arr[i].pci_dev == dev->path.pci.devfn)
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index 994ef9b..dbd982b 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -102,10 +102,10 @@
{
struct device *child;
- if (!dev->link_list)
+ if (!dev->downstream)
return;
- for (child = dev->link_list->children; child; child = child->sibling)
+ for (child = dev->downstream->children; child; child = child->sibling)
pch_lpc_loop_resources(child);
}
diff --git a/src/soc/intel/common/block/pcie/rtd3/rtd3.c b/src/soc/intel/common/block/pcie/rtd3/rtd3.c
index 39c82b1..3a7c8b4 100644
--- a/src/soc/intel/common/block/pcie/rtd3/rtd3.c
+++ b/src/soc/intel/common/block/pcie/rtd3/rtd3.c
@@ -140,7 +140,7 @@
enum pcie_rp_type rp_type,
const struct device *dev)
{
- const struct device *parent = dev->bus->dev;
+ const struct device *parent = dev->upstream->dev;
acpigen_write_method_serialized("_ON", 0);
@@ -224,7 +224,7 @@
const struct device *dev)
{
- const struct device *parent = dev->bus->dev;
+ const struct device *parent = dev->upstream->dev;
acpigen_write_method_serialized("_OFF", 0);
@@ -385,7 +385,7 @@
const struct soc_intel_common_block_pcie_rtd3_config *config = config_of(dev);
static const char *const power_res_states[] = {"_PR0"};
- const struct device *parent = dev->bus->dev;
+ const struct device *parent = dev->upstream->dev;
const char *scope = acpi_device_path(parent);
const struct opregion opregion = OPREGION("PXCS", PCI_CONFIG, 0, 0xff);
const struct fieldlist fieldlist[] = {
diff --git a/src/soc/intel/common/block/usb4/pcie.c b/src/soc/intel/common/block/usb4/pcie.c
index f2414cc..c066647 100644
--- a/src/soc/intel/common/block/usb4/pcie.c
+++ b/src/soc/intel/common/block/usb4/pcie.c
@@ -19,7 +19,7 @@
int port_id;
/* Get parent PCI device */
- parent = dev->bus->dev;
+ parent = dev->upstream->dev;
if (!parent) {
printk(BIOS_ERR, "%s: Unable to find parent device\n", __func__);
return;
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
index ff6fbf0..03ed578 100644
--- a/src/soc/intel/common/block/xhci/xhci.c
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -92,8 +92,8 @@
return;
}
- while ((hub = dev_bus_each_child(xhci->link_list, hub)) != NULL) {
- while ((port = dev_bus_each_child(hub->link_list, port)) != NULL) {
+ while ((hub = dev_bus_each_child(xhci->downstream, hub)) != NULL) {
+ while ((port = dev_bus_each_child(hub->downstream, port)) != NULL) {
enable = true;
config = config_of(port);
if (config->type == UPC_TYPE_INTERNAL) {
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 7ebca1e..ae923d7 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -275,7 +275,7 @@
/* Swizzle this device if needed */
config = targ_dev->chip_info;
- parent_bdf = targ_dev->path.pci.devfn | targ_dev->bus->secondary << 8;
+ parent_bdf = targ_dev->path.pci.devfn | targ_dev->upstream->secondary << 8;
if (is_dnv_swizzled_rp(parent_bdf) && irq_dev != targ_dev) {
swiz_int_pin = dnv_get_swizzled_pin(config, parent_bdf, new_int_pin);
printk(BIOS_DEBUG, "%s: dnv swizzle %s from %c to %c\n", __func__,
@@ -387,7 +387,7 @@
int_line = dnv_get_int_line(irq_dev);
printk(BIOS_DEBUG, "%s: %02x:%02x.%d pin %d int line %d\n", __func__,
- irq_dev->bus->secondary, devfn >> 3, devfn & 0x7, int_pin, int_line);
+ irq_dev->upstream->secondary, devfn >> 3, devfn & 0x7, int_pin, int_line);
pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line);
}
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index c3c47854..971fa33 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -760,7 +760,7 @@
for (dev = all_devices; dev; dev = dev->next) {
if (!(is_dev_enabled(dev) && dev->path.type == DEVICE_PATH_PCI &&
- dev->bus->secondary == 0))
+ dev->upstream->secondary == 0))
continue;
if (dev->path.pci.devfn == PCI_DEVFN_ROOT) {
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index f471edb..ea091ce 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -94,7 +94,7 @@
return NULL;
/* Match functions 0 and 1 for possible GPUs on a secondary bus */
- if (dev->bus && dev->bus->secondary > 0) {
+ if (dev->upstream && dev->upstream->secondary > 0) {
switch (PCI_FUNC(dev->path.pci.devfn)) {
case 0: return "DEV0";
case 1: return "DEV1";
diff --git a/src/soc/intel/xeon_sp/chip_common.c b/src/soc/intel/xeon_sp/chip_common.c
index 845e968..144dba1 100644
--- a/src/soc/intel/xeon_sp/chip_common.c
+++ b/src/soc/intel/xeon_sp/chip_common.c
@@ -78,7 +78,7 @@
bus->max_subordinate = sr->BusLimit;
printk(BIOS_SPEW, "Scanning IIO stack %d: busses %x-%x\n", dev->path.domain.domain,
- dev->link_list->secondary, dev->link_list->max_subordinate);
+ dev->downstream->secondary, dev->downstream->max_subordinate);
pci_host_bridge_scan_bus(dev);
}
@@ -116,14 +116,14 @@
if (!is_pcie_iio_stack_res(ri)) {
if (CONFIG(HAVE_IOAT_DOMAINS))
- soc_create_ioat_domains(dn, dev->bus, ri);
+ soc_create_ioat_domains(dn, dev->upstream, ri);
continue;
}
struct device_path path;
path.type = DEVICE_PATH_DOMAIN;
path.domain.domain = dn.domain_path;
- struct device *iio_domain = alloc_dev(dev->bus, &path);
+ struct device *iio_domain = alloc_dev(dev->upstream, &path);
if (iio_domain == NULL)
die("%s: out of memory.\n", __func__);
iio_domain->ops = &iio_pcie_domain_ops;
diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
index 2c19ed1..8b24ba2 100644
--- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
@@ -46,7 +46,7 @@
struct iiostack_resource stack_info = {0};
/* Only add RTxx entries once. */
- if (device->bus->secondary != 0 || device->bus->segment_group != 0)
+ if (device->upstream->secondary != 0 || device->upstream->segment_group != 0)
return;
get_iiostack_info(&stack_info);
diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c
index dfbd878..2e2b14a 100644
--- a/src/soc/intel/xeon_sp/skx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c
@@ -59,7 +59,7 @@
const IIO_UDS *hob = get_iio_uds();
/* Only add RTxx entries once. */
- if (device->bus->secondary != 0)
+ if (device->upstream->secondary != 0)
return;
for (int socket = 0, iio = 0; iio < hob->PlatformData.numofIIO; ++socket) {
diff --git a/src/soc/intel/xeon_sp/spr/soc_acpi.c b/src/soc/intel/xeon_sp/spr/soc_acpi.c
index cb7fe1d..a48302c 100644
--- a/src/soc/intel/xeon_sp/spr/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/spr/soc_acpi.c
@@ -341,7 +341,7 @@
bool stack_enabled;
/* Only add RTxx entries once. */
- if (device->bus->secondary != 0)
+ if (device->upstream->secondary != 0)
return;
/*
@@ -502,7 +502,7 @@
for (cpu = all_devices; cpu; cpu = cpu->next) {
if ((cpu->path.type != DEVICE_PATH_APIC)
- || (cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
+ || (cpu->upstream->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
continue;
}
if (!cpu->enabled)
diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c
index 1b232ea..ddc6e82 100644
--- a/src/soc/intel/xeon_sp/uncore.c
+++ b/src/soc/intel/xeon_sp/uncore.c
@@ -192,7 +192,7 @@
struct range_entry fsp_mem;
/* Only add dram resources once. */
- if (dev->bus->secondary != 0 || dev->bus->segment_group != 0)
+ if (dev->upstream->secondary != 0 || dev->upstream->segment_group != 0)
return;
/* Read in the MAP registers and report their values. */
diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c
index e2b47329..75b281b 100644
--- a/src/soc/intel/xeon_sp/uncore_acpi.c
+++ b/src/soc/intel/xeon_sp/uncore_acpi.c
@@ -225,7 +225,7 @@
uint32_t pcie_seg,
bool is_atsr, bool *first)
{
- const uint32_t bus = bridge_dev->bus->secondary;
+ const uint32_t bus = bridge_dev->upstream->secondary;
const uint32_t dev = PCI_SLOT(bridge_dev->path.pci.devfn);
const uint32_t func = PCI_FUNC(bridge_dev->path.pci.devfn);