device/device.h: Rename busses for clarity

This renames bus to upstream and link_list to downstream.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index fa29ef5..23d60dc 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -52,7 +52,7 @@
 
 static void mch_domain_set_resources(struct device *dev)
 {
-	assign_resources(dev->link_list);
+	assign_resources(dev->downstream);
 }
 
 struct device_operations e7505_pci_domain_ops = {
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 50d0d89..dc18791 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -122,7 +122,7 @@
 			report_resource_stored(dev, resource, "");
 	}
 
-	assign_resources(dev->link_list);
+	assign_resources(dev->downstream);
 }
 
 static void mch_domain_init(struct device *dev)
diff --git a/src/northbridge/intel/haswell/pcie.c b/src/northbridge/intel/haswell/pcie.c
index 7fe57e9..4eeaa3f 100644
--- a/src/northbridge/intel/haswell/pcie.c
+++ b/src/northbridge/intel/haswell/pcie.c
@@ -20,8 +20,8 @@
 	if (dev->path.type != DEVICE_PATH_PCI)
 		return NULL;
 
-	assert(dev->bus);
-	if (dev->bus->secondary == 0)
+	assert(dev->upstream);
+	if (dev->upstream->secondary == 0)
 		switch (dev->path.pci.devfn) {
 		case PCI_DEVFN(1, 0):
 			return "PEGP";
@@ -31,12 +31,12 @@
 			return "PEG2";
 		};
 
-	struct device *const port = dev->bus->dev;
+	struct device *const port = dev->upstream->dev;
 	assert(port);
-	assert(port->bus);
+	assert(port->upstream);
 
 	if (dev->path.pci.devfn == PCI_DEVFN(0, 0) &&
-	    port->bus->secondary == 0 &&
+	    port->upstream->secondary == 0 &&
 	    (port->path.pci.devfn == PCI_DEVFN(1, 0) ||
 	    port->path.pci.devfn == PCI_DEVFN(1, 1) ||
 	    port->path.pci.devfn == PCI_DEVFN(1, 2)))
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index d588197..0a72cb7 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -34,8 +34,8 @@
 
 	pci_domain_read_resources(dev);
 
-	pci_tolm = find_pci_tolm(dev->link_list);
-	mc_dev = dev->link_list->children;
+	pci_tolm = find_pci_tolm(dev->downstream);
+	mc_dev = dev->downstream->children;
 	if (mc_dev) {
 		unsigned long tomk, tolmk;
 		int idx;
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 34ebcb2..79e9ee5 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -26,7 +26,7 @@
 	/* Can we find out how much memory we can use at most
 	 * this way?
 	 */
-	pci_tolm = find_pci_tolm(dev->link_list);
+	pci_tolm = find_pci_tolm(dev->downstream);
 	printk(BIOS_DEBUG, "pci_tolm: 0x%x\n", pci_tolm);
 
 	tolud = pci_read_config8(d0f0, TOLUD) << 24;
@@ -65,7 +65,7 @@
 	for (res = dev->resource_list; res; res = res->next)
 		report_resource_stored(dev, res, "");
 
-	assign_resources(dev->link_list);
+	assign_resources(dev->downstream);
 }
 
 static const char *northbridge_acpi_name(const struct device *dev)
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index d7a6c84..c24493a 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -108,7 +108,7 @@
 	for (res = dev->resource_list; res; res = res->next)
 		report_resource_stored(dev, res, "");
 
-	assign_resources(dev->link_list);
+	assign_resources(dev->downstream);
 }
 
 static void mch_domain_init(struct device *dev)
diff --git a/src/northbridge/intel/sandybridge/pcie.c b/src/northbridge/intel/sandybridge/pcie.c
index 96fb12f..244b0f5 100644
--- a/src/northbridge/intel/sandybridge/pcie.c
+++ b/src/northbridge/intel/sandybridge/pcie.c
@@ -13,8 +13,8 @@
 	if (dev->path.type != DEVICE_PATH_PCI)
 		return NULL;
 
-	assert(dev->bus);
-	if (dev->bus->secondary == 0)
+	assert(dev->upstream);
+	if (dev->upstream->secondary == 0)
 		switch (dev->path.pci.devfn) {
 		case PCI_DEVFN(1, 0):
 			return "PEGP";
@@ -26,12 +26,12 @@
 			return "PEG6";
 		};
 
-	struct device *const port = dev->bus->dev;
+	struct device *const port = dev->upstream->dev;
 	assert(port);
-	assert(port->bus);
+	assert(port->upstream);
 
 	if (dev->path.pci.devfn == PCI_DEVFN(0, 0) &&
-	    port->bus->secondary == 0 &&
+	    port->upstream->secondary == 0 &&
 	    (port->path.pci.devfn == PCI_DEVFN(1, 0) ||
 	     port->path.pci.devfn == PCI_DEVFN(1, 1) ||
 	     port->path.pci.devfn == PCI_DEVFN(1, 2) ||
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index b037cf8..4987cae 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -72,7 +72,7 @@
 	for (res = dev->resource_list; res; res = res->next)
 		report_resource_stored(dev, res, "");
 
-	assign_resources(dev->link_list);
+	assign_resources(dev->downstream);
 }
 
 static void mch_domain_init(struct device *dev)