soc/amd/picasso/i2c: don't initialize I2C4 as master and refactor code
I2C0&1 are either not available or not functional. Add place holders
instead, so that the array index matches the I2C controller number. I2C4
is slave device only, so do not initialize it as I2C host controller.
Also do some slight refactoring.
BUG=b:153152871
BUG=b:153675916
Change-Id: I397b074ef9c14bf6a4f6680696582f5173a5d0d3
Signed-off-by: Martin Roth <martinroth@chromium.org>
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1897071
Reviewed-on: https://chromium-review.googlesource.com/2057468
Reviewed-on: https://chromium-review.googlesource.com/2094855
Reviewed-on: https://chromium-review.googlesource.com/2149870
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40247
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c
index 22c6216..8ba05aa 100644
--- a/src/soc/amd/picasso/i2c.c
+++ b/src/soc/amd/picasso/i2c.c
@@ -8,34 +8,39 @@
#include <device/device.h>
#include <drivers/i2c/designware/dw_i2c.h>
#include <amdblocks/acpimmio.h>
+#include <soc/i2c.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/southbridge.h>
-#include <soc/i2c.h>
#include "chip.h"
/* Global to provide access to chip.c */
const char *i2c_acpi_name(const struct device *dev);
-static const uintptr_t i2c_bus_address[] = {
+/*
+ * We don't have addresses for I2C0-1.
+ */
+static const uintptr_t i2c_bus_address[I2C_MASTER_DEV_COUNT + I2C_SLAVE_DEV_COUNT] = {
+ 0,
+ 0,
APU_I2C2_BASE,
APU_I2C3_BASE,
- APU_I2C4_BASE, /* slave device only */
+ APU_I2C4_BASE, /* Can only be used in slave mode */
};
uintptr_t dw_i2c_base_address(unsigned int bus)
{
- if (bus < APU_I2C_MIN_BUS || bus > APU_I2C_MAX_BUS)
+ if (bus >= ARRAY_SIZE(i2c_bus_address))
return 0;
- return i2c_bus_address[bus - APU_I2C_MIN_BUS];
+ return i2c_bus_address[bus];
}
const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus)
{
const struct soc_amd_picasso_config *config;
- if (bus < APU_I2C_MIN_BUS || bus > APU_I2C_MAX_BUS)
+ if (bus >= ARRAY_SIZE(config->i2c))
return NULL;
/* config is not NULL; if it was, config_of_soc calls die() internally */
@@ -83,7 +88,7 @@
/* config is not NULL; if it was, config_of_soc calls die() internally */
config = config_of_soc();
- for (i = 0; i < ARRAY_SIZE(config->i2c); i++) {
+ for (i = I2C_MASTER_START_INDEX; i < ARRAY_SIZE(config->i2c); i++) {
const struct dw_i2c_bus_config *cfg = &config->i2c[i];
if (cfg->early_init != is_early_init)