diff --git a/src/mainboard/intel/apollolake_rvp/devicetree.cb b/src/mainboard/intel/apollolake_rvp/devicetree.cb
index a983807..bf20913 100644
--- a/src/mainboard/intel/apollolake_rvp/devicetree.cb
+++ b/src/mainboard/intel/apollolake_rvp/devicetree.cb
@@ -21,8 +21,8 @@
 		device pci 0f.0 on end	# - CSE
 		device pci 11.0 on end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 		end
 		device pci 13.0 on end	# - PCIe-A 0
 		device pci 13.2 on end	# - Onboard Lan
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
index 551fc60..294d468 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
@@ -121,8 +121,8 @@
 		device pci 0f.2 on  end # - Heci3
 		device pci 11.0 off end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 		end
 		device pci 13.0 off end	# - PCIe-A 0 Slot 1
 		device pci 13.1 off end	# - PCIe-A 1
diff --git a/src/mainboard/intel/leafhill/devicetree.cb b/src/mainboard/intel/leafhill/devicetree.cb
index 0a152b6..c1bfb97 100644
--- a/src/mainboard/intel/leafhill/devicetree.cb
+++ b/src/mainboard/intel/leafhill/devicetree.cb
@@ -21,8 +21,8 @@
 		device pci 0f.0 on end	# - CSE
 		device pci 11.0 on end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 		end
 		device pci 13.0 on end	# - PCIe-A 0
 		device pci 13.2 on end	# - Onboard Lan
diff --git a/src/mainboard/intel/minnow3/devicetree.cb b/src/mainboard/intel/minnow3/devicetree.cb
index 0a152b6..c1bfb97 100644
--- a/src/mainboard/intel/minnow3/devicetree.cb
+++ b/src/mainboard/intel/minnow3/devicetree.cb
@@ -21,8 +21,8 @@
 		device pci 0f.0 on end	# - CSE
 		device pci 11.0 on end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 		end
 		device pci 13.0 on end	# - PCIe-A 0
 		device pci 13.2 on end	# - Onboard Lan
diff --git a/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb b/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
index a2a9df4..734f3f3 100644
--- a/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
+++ b/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb
@@ -19,8 +19,8 @@
 		device pci 0f.0 on  end # TXE
 		device pci 11.0 off end # ISH
 		device pci 12.0 on	# SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 		end
 		device pci 13.0 on      # PCIe-A 1 (Root Port 2)
 			register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
index a08f053..5d4acd8 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
@@ -69,8 +69,8 @@
 		device pci 0f.0 on  end	# - CSE
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 			register "DisableSataSalpSupport" = "1"
 		end
 		device pci 13.0 on	# - RP 2 - PCIe A 0 - MACPHY
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
index 1291497..7054413 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
@@ -67,8 +67,8 @@
 		device pci 0f.0 on  end	# - CSE
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 			register "sata_ports_ssd[0]" = "1"
 			register "sata_ports_ssd[1]" = "1"
 			register "DisableSataSalpSupport" = "1"
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
index 56d93aa..472f5ba 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
@@ -64,8 +64,8 @@
 		device pci 0f.0 on  end	# - CSE
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 			register "DisableSataSalpSupport" = "1"
 		end
 		device pci 13.0 on	# - RP 2 - PCIe A 0
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
index 1c5f797..baaff1e 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
@@ -58,8 +58,8 @@
 		device pci 0f.0 on  end	# - CSE
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 			register "DisableSataSalpSupport" = "1"
 		end
 		device pci 13.0 on	# - RP 2 - PCIe A 0
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
index b308ab2..52fcd49 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
@@ -67,8 +67,8 @@
 		device pci 0f.0 on  end	# - CSE
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 			register "sata_ports_ssd[0]" = "1"
 			register "sata_ports_ssd[1]" = "1"
 			register "DisableSataSalpSupport" = "1"
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
index 1885e81..dc66be6 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
@@ -38,8 +38,8 @@
 		device pci 0f.0 on  end	# - CSE
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 			register "sata_ports_ssd[0]" = "1"
 			register "sata_ports_ssd[1]" = "1"
 			register "DisableSataSalpSupport" = "1"
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
index f1ace5a..fb9070f 100644
--- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
@@ -71,7 +71,7 @@
 		device ref heci2	on  end
 		device ref heci3	on  end
 		device ref sata		on
-			register "SataPortsEnable[0]"	= "1"
+			register "sata_ports_enable[0]"	= "1"
 		end
 		device ref xhci		on
 			# Motherboard USB Type C
diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
index 71932a6..b4e627c 100644
--- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
@@ -71,7 +71,7 @@
 		device ref heci2	on  end
 		device ref heci3	on  end
 		device ref sata		on
-			register "SataPortsEnable[0]"	= "1"
+			register "sata_ports_enable[0]"	= "1"
 		end
 		device ref xhci		on
 			# Motherboard USB Type C
diff --git a/src/mainboard/up/squared/devicetree.cb b/src/mainboard/up/squared/devicetree.cb
index 4b0d5f7..4f5a91c 100644
--- a/src/mainboard/up/squared/devicetree.cb
+++ b/src/mainboard/up/squared/devicetree.cb
@@ -35,8 +35,8 @@
 		device pci 0f.0 on end	# - TXE
 		device pci 11.0 off end	# - ISH
 		device pci 12.0 on	# - SATA
-			register "SataPortsEnable[0]" = "1"
-			register "SataPortsEnable[1]" = "1"
+			register "sata_ports_enable[0]" = "1"
+			register "sata_ports_enable[1]" = "1"
 		end
 		device pci 13.0 on end	# - PCIe-A 1 - PcieRootPort[2]
 		device pci 13.1 on end  # - PCIe-A 2 - PcieRootPort[3]
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 7147011..04aa2eb 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -737,7 +737,7 @@
 	if (is_devfn_enabled(PCH_DEVFN_SATA)) {
 		silconfig->SataSalpSupport = !(cfg->DisableSataSalpSupport);
 		silconfig->SpeedLimit = cfg->sata_speed;
-		memcpy(silconfig->SataPortsEnable, cfg->SataPortsEnable,
+		memcpy(silconfig->SataPortsEnable, cfg->sata_ports_enable,
 			sizeof(silconfig->SataPortsEnable));
 		memcpy(silconfig->SataPortsSolidStateDrive, cfg->sata_ports_ssd,
 			sizeof(silconfig->SataPortsSolidStateDrive));
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 45b60d3..b956252 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -107,7 +107,7 @@
 	uint8_t SataPortsHotPlug[2];
 
 	/* Sata Ports Enable */
-	uint8_t SataPortsEnable[2];
+	uint8_t sata_ports_enable[2];
 
 	/* Sata Ports Solid State Drive */
 	uint8_t sata_ports_ssd[2];