tree 36de0888dbd087c6a84f45930afa7444c8adf4bc
parent 598f2babdcff16698b5928126f7cd8203120a8ea
author Martin Roth <martinroth@chromium.org> 1619043812 -0600
committer Felix Held <felix-coreboot@felixheld.de> 1619191613 +0000

util/spd_tools: Add MT53E1G32D2NP-046 WT:B LPDDR4 config

The revision B version of the MT53E1G32D2NP-046 memory chip will be used
in the next guybrush build.  It has a different internal layout than the
Revision A part, with 2 ZQ lines per module instead of 1.

BUG=b:186027256
TEST=Build only

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I066f40eb890648a9be17cfe0cee20d299000c11a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52586
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>