Here is a proposed way how to handle the SATA PHY settings on SB700. It
consits of weak function which always exists (with defaults) and a possibility to
override this with normal function in main.c. This is the other way of
doing that and not using the devictree.cb.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5825 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/mainboard/asrock/939a785gmh/mainboard.c b/src/mainboard/asrock/939a785gmh/mainboard.c
index 9cebdc2..09ace66 100644
--- a/src/mainboard/asrock/939a785gmh/mainboard.c
+++ b/src/mainboard/asrock/939a785gmh/mainboard.c
@@ -147,3 +147,25 @@
CHIP_NAME("Asrock 939A785GMH/128M Mainboard")
.enable_dev = mb_enable,
};
+
+/* override the default SATA PHY setup */
+void sb700_setup_sata_phys(struct device *dev) {
+ /* RPR7.6.1 Program the PHY Global Control to 0x2C00 */
+ pci_write_config16(dev, 0x86, 0x2c00);
+
+ /* RPR7.6.2 SATA GENI PHY ports setting */
+ pci_write_config32(dev, 0x88, 0x01B48016);
+ pci_write_config32(dev, 0x8c, 0x01B48016);
+ pci_write_config32(dev, 0x90, 0x01B48016);
+ pci_write_config32(dev, 0x94, 0x01B48016);
+ pci_write_config32(dev, 0x98, 0x01B48016);
+ pci_write_config32(dev, 0x9C, 0x01B48016);
+
+ /* RPR7.6.3 SATA GEN II PHY port setting for port [0~5]. */
+ pci_write_config16(dev, 0xA0, 0xA07A);
+ pci_write_config16(dev, 0xA2, 0xA07A);
+ pci_write_config16(dev, 0xA4, 0xA07A);
+ pci_write_config16(dev, 0xA6, 0xA07A);
+ pci_write_config16(dev, 0xA8, 0xA07A);
+ pci_write_config16(dev, 0xAA, 0xA0FF);
+}