mb/hp: Get rid of whitespace before tab

Change-Id: I3f85e2ef0682b808f6e99dc406bccb88badcb82c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
diff --git a/src/mainboard/hp/8770w/devicetree.cb b/src/mainboard/hp/8770w/devicetree.cb
index 8402837f..0487cf3 100644
--- a/src/mainboard/hp/8770w/devicetree.cb
+++ b/src/mainboard/hp/8770w/devicetree.cb
@@ -37,7 +37,7 @@
 			subsystemid 0x103c 0x176c
 		end
 		device pci 01.0 on # PCIe Bridge for discrete graphics
-                	device pci 00.0 on end # GPU
+			device pci 00.0 on end # GPU
 			device pci 00.1 on end # HDMI Audio on GPU
 		end
 		device pci 02.0 off # Internal graphics VGA controller
diff --git a/src/mainboard/hp/abm/acpi/gpe.asl b/src/mainboard/hp/abm/acpi/gpe.asl
index 9a84698..87b0d21 100644
--- a/src/mainboard/hp/abm/acpi/gpe.asl
+++ b/src/mainboard/hp/abm/acpi/gpe.asl
@@ -71,4 +71,4 @@
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
-} 	/* End Scope GPE */
+}	/* End Scope GPE */
diff --git a/src/mainboard/hp/abm/dsdt.asl b/src/mainboard/hp/abm/dsdt.asl
index e709989..e2d0208 100644
--- a/src/mainboard/hp/abm/dsdt.asl
+++ b/src/mainboard/hp/abm/dsdt.asl
@@ -46,7 +46,7 @@
 
 	/* System Bus */
 	Scope(\_SB) { /* Start \_SB scope */
-	 	/* global utility methods expected within the \_SB scope */
+		/* global utility methods expected within the \_SB scope */
 		#include <arch/x86/acpi/globutil.asl>
 
 		/* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
diff --git a/src/mainboard/hp/dl165_g6_fam10/devicetree.cb b/src/mainboard/hp/dl165_g6_fam10/devicetree.cb
index e321393..4e08efd 100644
--- a/src/mainboard/hp/dl165_g6_fam10/devicetree.cb
+++ b/src/mainboard/hp/dl165_g6_fam10/devicetree.cb
@@ -16,7 +16,7 @@
 					end
 					device pci 2.0 on
 					end  # unused
-					device pci 3.0 on  	# bridge to slot PCI-E 16x ??
+					device pci 3.0 on	# bridge to slot PCI-E 16x ??
 					end
 					device pci 4.0 on
 					end  # unused
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl
index deecdc6..ace1d26 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl
+++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl
@@ -73,4 +73,4 @@
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
 		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
-} 	/* End Scope GPE */
+}	/* End Scope GPE */
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl
index 947a2f2..d516cce 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl
+++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl
@@ -44,7 +44,7 @@
 
 	/* On older chips, clear PciExpWakeDisEn */
 	/*if (LLessEqual(\_SB.SBRI, 0x13)) {
-	*    	Store(0,\_SB.PWDE)
+	*	Store(0,\_SB.PWDE)
 	*}
 	*/
 
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
index 455b059..ed79dad 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
@@ -171,8 +171,8 @@
 #if IS_ENABLED(CONFIG_GFXUMA)
 #define BLDCFG_UMA_ALIGNMENT                      UMA_4MB_ALIGNED
 #define BLDCFG_UMA_ALLOCATION_MODE		  UMA_SPECIFIED
-//#define BLDCFG_UMA_ALLOCATION_SIZE      	  0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
-#define BLDCFG_UMA_ALLOCATION_SIZE      	  0x2000//512M
+//#define BLDCFG_UMA_ALLOCATION_SIZE		  0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
+#define BLDCFG_UMA_ALLOCATION_SIZE		  0x2000//512M
 #define BLDCFG_UMA_ABOVE4G_SUPPORT                FALSE
 #endif
 
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.h b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.h
index f2e080d..057eb1d 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.h
+++ b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.h
@@ -30,7 +30,7 @@
 /* Any GEVENT pin can be mapped to any GPE. We try to keep the mapping 1:1, but
  * we make the distinction between GEVENT pin and SCI.
  */
-#define EC_SCI_GPE 		EC_SCI_GEVENT
+#define EC_SCI_GPE		EC_SCI_GEVENT
 #define EC_LID_GPE		EC_LID_GEVENT
 #define PME_GPE			0x0b
 #define PCIE_GPE		0x18