tree 672261aaacdb84e08822caaf6a17548b72867f75
parent 83e9f048024ab3a527d886d4591b29513c628f79
author Felix Held <felix-coreboot@felixheld.de> 1700147209 +0100
committer Felix Held <felix-coreboot@felixheld.de> 1702991503 +0000

nb/amd/pi/00730F01: assign northbridge ops in chipset devicetree

Since the northbridge is always function 0 of device 0 on bus 0, the
device operations can be statically assigned in the devicetree and
there's no need to bind the northbridge device operations to the PCI
device during runtime via a list of PCI IDs.

TEST=PC Engines APU2 still boots and doesn't show any new problems

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia7faaa468ff77e05c378c5555622c3584cfe3f81
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>