soc/amd/cezanne: Initialize I2C
Add I2C initialization in romstage and ramstage.
TEST=To test the I2C connection on Majolica, which doesn't have SPD
connection, call the function below after i2c_soc_init is called.
i2c_read_bytes(2, 0x4d, addr, data, 1);/* Read out 1 byte one time */
It can get the register values of TMP432B.
Or
/* Override EC port in ec.h */
#define EC_DATA 0x662
#define EC_SC 0x666
ec_write(0xA9, 0x40);
i2c_read_bytes(1, 0x10, addr, data, 2);/* Read out 2 bytes one time */
It can get the register values of CM32181A3OP(ALS).
Change-Id: I3a2a1494b44b68e8d8204fba0c90e769e0256e6f
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51029
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 119889d..7a69cc7 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -16,6 +16,7 @@
select ARCH_RAMSTAGE_X86_32
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
select DRIVERS_USB_ACPI
+ select DRIVERS_I2C_DESIGNWARE
select DRIVERS_USB_PCI_XHCI
select FSP_COMPRESS_FSP_M_LZMA
select FSP_COMPRESS_FSP_S_LZMA
@@ -189,6 +190,10 @@
hex
default 0x800
+config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
+ int
+ default 150
+
menu "PSP Configuration Options"
config AMD_FWM_POSITION_INDEX