southbridge/intel: add IS_ENABLED() around Kconfig symbol references
Change-Id: I2b532522938123bb7844cef94cda0b44bcb98e45
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 355db4b..c393feb 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -37,7 +37,7 @@
#include "me.h"
#include "pch.h"
-#if CONFIG_CHROMEOS
+#if IS_ENABLED(CONFIG_CHROMEOS)
#include <vendorcode/google/chromeos/chromeos.h>
#include <vendorcode/google/chromeos/gnvs.h>
#endif
@@ -59,7 +59,7 @@
static u32 *mei_base_address;
void intel_me_mbp_clear(device_t dev);
-#if CONFIG_DEBUG_INTEL_ME
+#if IS_ENABLED(CONFIG_DEBUG_INTEL_ME)
static void mei_dump(void *ptr, int dword, int offset, const char *type)
{
struct mei_csr *csr;
@@ -519,7 +519,7 @@
#endif /* CONFIG_DEBUG_INTEL_ME */
#endif
-#if CONFIG_CHROMEOS && 0 /* DISABLED */
+#if IS_ENABLED(CONFIG_CHROMEOS) && 0 /* DISABLED */
/* Tell ME to issue a global reset */
static int mkhi_global_reset(void)
{
@@ -579,7 +579,7 @@
if (!mei_base_address || mei_base_address == (u32 *)0xfffffff0)
return;
-#if CONFIG_ME_MBP_CLEAR_LATE
+#if IS_ENABLED(CONFIG_ME_MBP_CLEAR_LATE)
/* Wait for ME MBP Cleared indicator */
intel_me_mbp_clear(PCH_ME_DEV);
#endif
@@ -707,7 +707,7 @@
path = ME_ERROR_BIOS_PATH;
}
-#if CONFIG_ELOG
+#if IS_ENABLED(CONFIG_ELOG)
if (path != ME_NORMAL_BIOS_PATH) {
struct elog_event_data_me_extended data = {
.current_working_state = hfs.working_state,
@@ -796,7 +796,7 @@
}
printk(BIOS_DEBUG, "\n");
-#if CONFIG_CHROMEOS
+#if IS_ENABLED(CONFIG_CHROMEOS)
/* Save hash in NVS for the OS to verify */
chromeos_set_me_hash(extend, count);
#endif
@@ -835,7 +835,7 @@
#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
me_print_fw_version(mbp_data.fw_version_name);
-#if CONFIG_DEBUG_INTEL_ME
+#if IS_ENABLED(CONFIG_DEBUG_INTEL_ME)
me_print_fwcaps(mbp_data.fw_capabilities);
#endif
@@ -991,7 +991,7 @@
host.interrupt_generate = 1;
write_host_csr(&host);
-#if !CONFIG_ME_MBP_CLEAR_LATE
+#if !IS_ENABLED(CONFIG_ME_MBP_CLEAR_LATE)
/* Wait for the mbp_cleared indicator. */
intel_me_mbp_clear(dev);
#endif
@@ -1000,7 +1000,7 @@
#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n",
mbp->header.num_entries, mbp->header.mbp_size);
-#if CONFIG_DEBUG_INTEL_ME
+#if IS_ENABLED(CONFIG_DEBUG_INTEL_ME)
for (i = 0; i < mbp->header.mbp_size - 1; i++) {
printk(BIOS_INFO, "ME MBP: %04x: 0x%08x\n", i, mbp->data[i]);
}