mb/intel/ehlcrb: Adjust TSN GBE settings in devicetree
Set PCH TSN link speed to 1 Gbps and enable MultiVC for all TSN
ports.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I8d43c3ba8f02645c8ad2993f76e610d838b0151a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Praveen HP <praveen.hodagatta.pranesh@intel.com>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
index 8b075ff..d3d1142 100644
--- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
+++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
@@ -153,8 +153,11 @@
}"
# TSN GBE related UPDs
- register "PchTsnGbeLinkSpeed" = "Tsn_2_5_Gbps"
+ register "PchTsnGbeLinkSpeed" = "Tsn_1_Gbps"
register "PchTsnGbeSgmiiEnable" = "1"
+ register "PchTsnGbeMultiVcEnable" = "1"
+ register "PseTsnGbeMultiVcEnable[0]" = "1"
+ register "PseTsnGbeMultiVcEnable[1]" = "1"
# GPIO for SD card detect
register "sdcard_cd_gpio" = "GPP_G5"