cbmem_top_chipset: Change the return value to uintptr_t
Get rid of a lot of casts.
Change-Id: I93645ef5dd270905ce421e68e342aff4c331eae6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
diff --git a/src/soc/amd/stoneyridge/memmap.c b/src/soc/amd/stoneyridge/memmap.c
index f015740..7a225e1 100644
--- a/src/soc/amd/stoneyridge/memmap.c
+++ b/src/soc/amd/stoneyridge/memmap.c
@@ -12,7 +12,7 @@
#include <soc/iomap.h>
#include <amdblocks/biosram.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
msr_t tom = rdmsr(TOP_MEM);
@@ -20,8 +20,7 @@
return 0;
/* 8MB alignment to keep MTRR usage low */
- return (void *)ALIGN_DOWN(restore_top_of_low_cacheable()
- - CONFIG_SMM_TSEG_SIZE, 8 * MiB);
+ return ALIGN_DOWN(restore_top_of_low_cacheable() - CONFIG_SMM_TSEG_SIZE, 8 * MiB);
}
static uintptr_t smm_region_start(void)
diff --git a/src/soc/cavium/cn81xx/cbmem.c b/src/soc/cavium/cn81xx/cbmem.c
index d50fe16..0b0c717 100644
--- a/src/soc/cavium/cn81xx/cbmem.c
+++ b/src/soc/cavium/cn81xx/cbmem.c
@@ -5,8 +5,8 @@
#include <soc/sdram.h>
#include <symbols.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
/* Make sure not to overlap with reserved ATF scratchpad */
- return (void *)((uintptr_t)_dram + (sdram_size_mb() - 1) * MiB);
+ return (uintptr_t)_dram + (sdram_size_mb() - 1) * MiB;
}
diff --git a/src/soc/intel/baytrail/memmap.c b/src/soc/intel/baytrail/memmap.c
index aa8e890..43b96c1 100644
--- a/src/soc/intel/baytrail/memmap.c
+++ b/src/soc/intel/baytrail/memmap.c
@@ -16,9 +16,9 @@
return CONFIG_SMM_TSEG_SIZE;
}
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *) smm_region_start();
+ return smm_region_start();
}
void smm_region(uintptr_t *start, size_t *size)
diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c
index 4a791ef..3c3ad74 100644
--- a/src/soc/intel/braswell/memmap.c
+++ b/src/soc/intel/braswell/memmap.c
@@ -19,7 +19,7 @@
*size = smm_region_size();
}
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
uintptr_t smm_base;
size_t smm_size;
@@ -53,5 +53,5 @@
*/
smm_region(&smm_base, &smm_size);
- return (void *)smm_base;
+ return smm_base;
}
diff --git a/src/soc/intel/broadwell/memmap.c b/src/soc/intel/broadwell/memmap.c
index b467dc0..98c8016 100644
--- a/src/soc/intel/broadwell/memmap.c
+++ b/src/soc/intel/broadwell/memmap.c
@@ -29,9 +29,9 @@
return tom;
}
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *) dpr_region_start();
+ return dpr_region_start();
}
void smm_region(uintptr_t *start, size_t *size)
diff --git a/src/soc/mediatek/common/cbmem.c b/src/soc/mediatek/common/cbmem.c
index f9d11e9..0ca9e6b 100644
--- a/src/soc/mediatek/common/cbmem.c
+++ b/src/soc/mediatek/common/cbmem.c
@@ -7,7 +7,7 @@
#define MAX_DRAM_ADDRESS ((uintptr_t)4 * GiB)
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)MIN((uintptr_t)_dram + sdram_size(), MAX_DRAM_ADDRESS);
+ return MIN((uintptr_t)_dram + sdram_size(), MAX_DRAM_ADDRESS);
}
diff --git a/src/soc/nvidia/tegra124/cbmem.c b/src/soc/nvidia/tegra124/cbmem.c
index 3f59f06..287ef629 100644
--- a/src/soc/nvidia/tegra124/cbmem.c
+++ b/src/soc/nvidia/tegra124/cbmem.c
@@ -1,10 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
+#include <commonlib/bsd/helpers.h>
#include <soc/display.h>
#include <soc/sdram.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)((sdram_max_addressable_mb() - FB_SIZE_MB) << 20UL);
+ return (sdram_max_addressable_mb() - FB_SIZE_MB) * MiB;
}
diff --git a/src/soc/nvidia/tegra210/cbmem.c b/src/soc/nvidia/tegra210/cbmem.c
index d9b2226..a56f150 100644
--- a/src/soc/nvidia/tegra210/cbmem.c
+++ b/src/soc/nvidia/tegra210/cbmem.c
@@ -3,7 +3,7 @@
#include <cbmem.h>
#include <soc/addressmap.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
static uintptr_t addr;
@@ -19,5 +19,5 @@
addr = end_mib << 20;
}
- return (void *)addr;
+ return addr;
}
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c
index 50249b7..45b221b 100644
--- a/src/soc/nvidia/tegra210/ramstage.c
+++ b/src/soc/nvidia/tegra210/ramstage.c
@@ -59,7 +59,7 @@
/* Ramstage is run on a different core, so passing cbmem_top
via calling arguments is not an option, but it is not a problem
to call cbmem_top_chipset() again here to populate _cbmem_top_ptr. */
- _cbmem_top_ptr = (uintptr_t)cbmem_top_chipset();
+ _cbmem_top_ptr = cbmem_top_chipset();
/* Jump to boot state machine in common code. */
main();
diff --git a/src/soc/qualcomm/ipq40xx/cbmem.c b/src/soc/qualcomm/ipq40xx/cbmem.c
index 0ee9f9a..c5d1a81 100644
--- a/src/soc/qualcomm/ipq40xx/cbmem.c
+++ b/src/soc/qualcomm/ipq40xx/cbmem.c
@@ -10,7 +10,7 @@
cbmem_backing_store_ready = 1;
}
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
/*
* In romstage, make sure that cbmem backing store is ready before
@@ -19,7 +19,7 @@
* for loading ipq blobs before DRAM is initialized).
*/
if (cbmem_backing_store_ready == 0)
- return NULL;
+ return 0;
- return _memlayout_cbmem_top;
+ return (uintptr_t)_memlayout_cbmem_top;
}
diff --git a/src/soc/qualcomm/ipq806x/cbmem.c b/src/soc/qualcomm/ipq806x/cbmem.c
index a695cf8..8196416 100644
--- a/src/soc/qualcomm/ipq806x/cbmem.c
+++ b/src/soc/qualcomm/ipq806x/cbmem.c
@@ -10,7 +10,7 @@
cbmem_backing_store_ready = 1;
}
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
/*
* In romstage, make sure that cbmem backing store is ready before
@@ -20,7 +20,7 @@
* initialized).
*/
if (cbmem_backing_store_ready == 0)
- return NULL;
+ return 0;
- return _memlayout_cbmem_top;
+ return (uintptr_t)_memlayout_cbmem_top;
}
diff --git a/src/soc/qualcomm/qcs405/cbmem.c b/src/soc/qualcomm/qcs405/cbmem.c
index 97ba38b..e8bab77 100644
--- a/src/soc/qualcomm/qcs405/cbmem.c
+++ b/src/soc/qualcomm/qcs405/cbmem.c
@@ -2,7 +2,7 @@
#include <cbmem.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)((uintptr_t)3 * GiB);
+ return (uintptr_t)3 * GiB;
}
diff --git a/src/soc/qualcomm/sc7180/cbmem.c b/src/soc/qualcomm/sc7180/cbmem.c
index 4b9eb37..5fff371 100644
--- a/src/soc/qualcomm/sc7180/cbmem.c
+++ b/src/soc/qualcomm/sc7180/cbmem.c
@@ -2,7 +2,7 @@
#include <cbmem.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)((uintptr_t)4 * GiB);
+ return (uintptr_t)4 * GiB;
}
diff --git a/src/soc/qualcomm/sc7280/cbmem.c b/src/soc/qualcomm/sc7280/cbmem.c
index 4b9eb37..5fff371 100644
--- a/src/soc/qualcomm/sc7280/cbmem.c
+++ b/src/soc/qualcomm/sc7280/cbmem.c
@@ -2,7 +2,7 @@
#include <cbmem.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)((uintptr_t)4 * GiB);
+ return (uintptr_t)4 * GiB;
}
diff --git a/src/soc/rockchip/common/cbmem.c b/src/soc/rockchip/common/cbmem.c
index 5650114..172491e 100644
--- a/src/soc/rockchip/common/cbmem.c
+++ b/src/soc/rockchip/common/cbmem.c
@@ -6,8 +6,7 @@
#include <soc/sdram.h>
#include <symbols.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)MIN((uintptr_t)_dram + sdram_size_mb() * MiB,
- MAX_DRAM_ADDRESS);
+ return MIN((uintptr_t)_dram + sdram_size_mb() * MiB, MAX_DRAM_ADDRESS);
}
diff --git a/src/soc/samsung/exynos5250/cbmem.c b/src/soc/samsung/exynos5250/cbmem.c
index 167bd80..d74b414 100644
--- a/src/soc/samsung/exynos5250/cbmem.c
+++ b/src/soc/samsung/exynos5250/cbmem.c
@@ -3,7 +3,7 @@
#include <cbmem.h>
#include <soc/cpu.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)(get_fb_base_kb() * KiB);
+ return get_fb_base_kb() * KiB;
}
diff --git a/src/soc/samsung/exynos5420/cbmem.c b/src/soc/samsung/exynos5420/cbmem.c
index 167bd80..d74b414 100644
--- a/src/soc/samsung/exynos5420/cbmem.c
+++ b/src/soc/samsung/exynos5420/cbmem.c
@@ -3,7 +3,7 @@
#include <cbmem.h>
#include <soc/cpu.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)(get_fb_base_kb() * KiB);
+ return get_fb_base_kb() * KiB;
}
diff --git a/src/soc/sifive/fu540/cbmem.c b/src/soc/sifive/fu540/cbmem.c
index af04130..53e5fcf 100644
--- a/src/soc/sifive/fu540/cbmem.c
+++ b/src/soc/sifive/fu540/cbmem.c
@@ -6,8 +6,7 @@
#include <soc/sdram.h>
#include <symbols.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return (void *)MIN((uintptr_t)_dram + sdram_size_mb() * MiB,
- FU540_MAXDRAM);
+ return MIN((uintptr_t)_dram + sdram_size_mb() * MiB, FU540_MAXDRAM);
}
diff --git a/src/soc/ti/am335x/cbmem.c b/src/soc/ti/am335x/cbmem.c
index 170695e..14c927e 100644
--- a/src/soc/ti/am335x/cbmem.c
+++ b/src/soc/ti/am335x/cbmem.c
@@ -4,7 +4,7 @@
#include <commonlib/bsd/helpers.h>
#include <symbols.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return _dram + CONFIG_DRAM_SIZE_MB * MiB;
+ return (uintptr_t)_dram + CONFIG_DRAM_SIZE_MB * MiB;
}
diff --git a/src/soc/ucb/riscv/cbmem.c b/src/soc/ucb/riscv/cbmem.c
index 157e443..5c423a0 100644
--- a/src/soc/ucb/riscv/cbmem.c
+++ b/src/soc/ucb/riscv/cbmem.c
@@ -4,7 +4,7 @@
#include <symbols.h>
#include <ramdetect.h>
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
- return _dram + (probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB) * MiB);
+ return (uintptr_t)_dram + (probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB) * MiB);
}