sb/amd/sp5100: Disable ASF legacy sensor support per RPR v3.02
Change-Id: I8628dc433e12892b0839d727165f609c8b34f66e
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14306
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index ffdd34b..26ee836 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -399,8 +399,15 @@
if (inb(SMBUS_IO_BASE) == 0xff)
printk(BIOS_INFO, "%s: Primary SMBUS controller I/O not found\n", __func__);
- if (inb(SMBUS_AUX_IO_BASE) == 0xff)
+ if (inb(SMBUS_AUX_IO_BASE) == 0xff) {
printk(BIOS_INFO, "%s: Secondary SMBUS controller I/O not found\n", __func__);
+ }
+ else {
+ if (IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100)) {
+ /* Disable legacy sensor support / reset ASF Slave state machine per RPR 2.27 step 3 */
+ outb(0x40, SMBUS_AUX_IO_BASE + SMBSLVMISC);
+ }
+ }
/* KB2RstEnable */
pci_write_config8(dev, 0x40, 0x44);
diff --git a/src/southbridge/amd/sb700/smbus.h b/src/southbridge/amd/sb700/smbus.h
index 0e6b7b8..1b90091 100644
--- a/src/southbridge/amd/sb700/smbus.h
+++ b/src/southbridge/amd/sb700/smbus.h
@@ -37,6 +37,7 @@
#define SMBSLVCMD_SHADOW 0x9
#define SMBSLVEVT 0xa
#define SMBSLVDAT 0xc
+#define SMBSLVMISC 0xd
#define AX_INDXC 0
#define AX_INDXP 1