##
## This file is part of the coreboot project.
##
## Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
## Copyright (C) 2007 AMD
## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##

entries

0          384       r       0        reserved_memory
384          1       e       4        boot_option
388          4       r       0        reboot_bits
393          3       e       5        baud_rate
396          5       e       10       ecc_scrub_rate
401          1       e       1        interleave_chip_selects
402          1       e       1        interleave_nodes
403          1       e       1        interleave_memory_channels
404          4       e       8        max_mem_clock
408          1       e       2        multi_core
412          4       e       6        debug_level
440          4       e       9        slow_cpu
444          1       e       1        nmi
445          1       e       1        iommu
446          2       e       3        power_on_after_fail
456          1       e       1        ECC_memory
457          1       e       1        ECC_redirection
458          4       e       11       hypertransport_speed_limit
462          2       e       12       minimum_memory_voltage
464          1       e       2        compute_unit_siblings
465          1       e       1        cpu_c_states
466          1       e       1        cpu_cc6_state
467          1       e       1        sata_ahci_mode
468          1       e       1        sata_alpm
469          4       h       0        maximum_p_state_limit
473          2       e       13       dimm_spd_checksum
475          1       r       0        allow_spd_nvram_cache_restore
477          1       e       1        ieee1394_controller
728        256       h       0        user_data
984         16       h       0        check_sum
# Reserve the extended AMD configuration registers
1000        24       r       0        amd_reserved


enumerations

#ID value   text
1     0     Disable
1     1     Enable
2     0     Enable
2     1     Disable
3     0     Off
3     1     On
3     2     Last
4     0     Fallback
4     1     Normal
5     0     115200
5     1     57600
5     2     38400
5     3     19200
5     4     9600
5     5     4800
5     6     2400
5     7     1200
6     0     Emergency
6     1     Alert
6     2     Critical
6     3     Error
6     4     Warning
6     5     Notice
6     6     Information
6     7     Debug
6     8     Spew
8     0     DDR3-1866
8     1     DDR3-1600
8     2     DDR3-1333
8     3     DDR3-1066
8     4     DDR3-800
8     5     DDR3-667
9     0     off
9     1     87.5%
9     2     75.0%
9     3     62.5%
9     4     50.0%
9     5     37.5%
9     6     25.0%
9     7     12.5%
10    0     Disabled
10    1     40ns
10    2     80ns
10    3     160ns
10    4     320ns
10    5     640ns
10    6     1.28us
10    7     2.56us
10    8     5.12us
10    9     10.2us
10    10    20.5us
10    11    41us
10    12    81.9us
10    13    163.8us
10    14    327.7us
10    15    655.4us
10    16    1.31ms
10    17    2.62ms
10    18    5.24ms
10    19    10.49ms
10    20    20.97ms
10    21    42ms
10    22    84ms
11    0     Auto
11    1     2.6GHz
11    2     2.4GHz
11    3     2.2GHz
11    4     2.0GHz
11    5     1.8GHz
11    6     1.6GHz
11    7     1.4GHz
11    8     1.2GHz
11    9     1.0GHz
11    10    800MHz
11    11    600MHz
11    12    500MHz
11    13    400MHz
11    14    300MHz
11    15    200MHz
12    0     1.5V
12    1     1.35V
12    2     1.25V
12    3     1.15V
13    0     Enforce
13    1     Ignore
13    2     Override

checksums

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