soc/amd/stoneyridge/fch: use read[16,32]p to avoid typecasts
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I6372741284ad5f0453f0d4dfd8ebaddd7385f8ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67977
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
diff --git a/src/soc/amd/stoneyridge/fch.c b/src/soc/amd/stoneyridge/fch.c
index 2b2c6de..9680fb2 100644
--- a/src/soc/amd/stoneyridge/fch.c
+++ b/src/soc/amd/stoneyridge/fch.c
@@ -152,12 +152,10 @@
size_t fwsize;
amdfw_rom = 0x20000 - (0x80000 << CONFIG_AMD_FWM_POSITION_INDEX);
- xhci_fw = read32((void *)(amdfw_rom + XHCI_FW_SIG_OFFSET));
+ xhci_fw = read32p(amdfw_rom + XHCI_FW_SIG_OFFSET);
- fwaddr = 2 + read16((void *)(xhci_fw + XHCI_FW_ADDR_OFFSET
- + XHCI_FW_BOOTRAM_SIZE));
- fwsize = read16((void *)(xhci_fw + XHCI_FW_SIZE_OFFSET
- + XHCI_FW_BOOTRAM_SIZE));
+ fwaddr = 2 + read16p(xhci_fw + XHCI_FW_ADDR_OFFSET + XHCI_FW_BOOTRAM_SIZE);
+ fwsize = read16p(xhci_fw + XHCI_FW_SIZE_OFFSET + XHCI_FW_BOOTRAM_SIZE);
gnvs->fw00 = 0;
gnvs->fw01 = ((32 * KiB) << 16) + 0;
gnvs->fw02 = fwaddr + XHCI_FW_BOOTRAM_SIZE;