SPI flash: Fix alignment checks in Page Program commands

There are two separate restrictions to take into account:

  Page Program command must not cross address boundaries defined by the
  flash part's page size.

  Total number of bytes for any command sent to flash part is restricted
  by the SPI controller capabilities.


  CONTROLLER_PAGE_LIMIT=64, page_size=256, offset=62, len=4.
  This write would be split at offset 64 for no reason.


  CONTROLLER_PAGE_LIMIT=40, page_size=256, offset=254, len=4.
  This write would not be split at page boundary as required.

We do not really hit the second case. Nevertheless, CONTROLLER_PAGE_LIMIT
is a misnomer for the maximum payload length supported by the SPI controller
and is removed in a followup.

Change-Id: I727f2e7de86a91b6a509460ff1f374acd006a0bc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6162
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
6 files changed