Enable 440BX NB to use large memory modules
Signed-off-by: Anders Jenbo <anders@jenbo.dk>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5508 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index d5ade1a..eceaaee 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -694,6 +694,23 @@
sz.side1 *= 4;
sz.side2 *= 4;
+ /* It is possible to partially use larger then supported
+ * modules by setting them to a supported size.
+ */
+ if(sz.side1 > 128) {
+ PRINT_DEBUG("Side1 was 0x");
+ PRINT_DEBUG_HEX16(sz.side1);
+ PRINT_DEBUG(" but only 128MB will be used.\n");
+ sz.side1 = 128;
+
+ if(sz.side2 > 128) {
+ PRINT_DEBUG("Side2 was 0x");
+ PRINT_DEBUG_HEX16(sz.side2);
+ PRINT_DEBUG(" but only 128MB will be used.\n");
+ sz.side2 = 128;
+ }
+ }
+
return sz;
}
/*
@@ -792,6 +809,12 @@
dra = 0x1; /* 4KB */
} else if (dra == 8) {
dra = 0x2; /* 8KB */
+ } else if (dra >= 16) {
+ /* Page sizes larger than supported are
+ * set to 8KB to use module partially.
+ */
+ PRINT_DEBUG("Page size forced to 8KB.\n");
+ dra = 0x2; /* 8KB */
} else {
dra = -1;
}
@@ -808,6 +831,10 @@
dra = 0x05; /* 4KB */
} else if (dra == 8) {
dra = 0x0a; /* 8KB */
+ } else if (dra >= 16) {
+ /* Ditto */
+ PRINT_DEBUG("Page size forced to 8KB.\n");
+ dra = 0x0a; /* 8KB */
} else {
dra = -1;
}
@@ -826,7 +853,7 @@
/*
* 440BX supports asymmetrical dual-sided DIMMs,
* but can't handle DIMMs smaller than 8MB per
- * side or larger than 128MB per side.
+ * side.
*/
struct dimm_size sz = spd_get_dimm_size(device);
if ((sz.side1 < 8)) {
@@ -834,11 +861,6 @@
"are not supported on this NB.\n");
die("HALT\n");
}
- if ((sz.side1 > 128)) {
- print_err("DIMMs > 128MB per side\n"
- "are not supported on this NB\n");
- die("HALT\n");
- }
/* Divide size by 8 to set up the DRB registers. */
drb += (sz.side1 / 8);