acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'
BUG=b:155428745
Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c
index dc5da79..241c1a0 100644
--- a/src/southbridge/intel/bd82x6x/elog.c
+++ b/src/southbridge/intel/bd82x6x/elog.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <arch/io.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 35d71a4d..1100544 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -12,8 +12,8 @@
#include <pc80/i8259.h>
#include <arch/io.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
#include <string.h>
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index b1f3bfe..ae62638 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -9,7 +9,7 @@
* not used unless the console loglevel is high enough.
*/
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 054c29f..d240bf6 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -9,7 +9,7 @@
* not used unless the console loglevel is high enough.
*/
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <device/mmio.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 0a236c6b..a452263 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -4,7 +4,7 @@
#ifndef SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
#define SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
/* PCH types */
#define PCH_TYPE_CPT 0x1c /* CougarPoint */
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c
index 20dafdf..d1a00f44 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.c
+++ b/src/southbridge/intel/common/acpi_pirq_gen.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/common/madt.c b/src/southbridge/intel/common/madt.c
index d425a74..fe65afa 100644
--- a/src/southbridge/intel/common/madt.c
+++ b/src/southbridge/intel/common/madt.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c
index e5bbdab..4f77bb0 100644
--- a/src/southbridge/intel/common/pciehp.c
+++ b/src/southbridge/intel/common/pciehp.c
@@ -2,8 +2,8 @@
/* This file is part of the coreboot project. */
#include <string.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c
index 6175302..d78e9cd 100644
--- a/src/southbridge/intel/common/pmbase.c
+++ b/src/southbridge/intel/common/pmbase.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <stdint.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/io.h>
#include <bootmode.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/common/pmclib.c b/src/southbridge/intel/common/pmclib.c
index d44d619..72df0ff8 100644
--- a/src/southbridge/intel/common/pmclib.c
+++ b/src/southbridge/intel/common/pmclib.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <stdint.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <console/console.h>
#include "pmclib.h"
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 7b27ce0..3e3dca9 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -4,7 +4,7 @@
#include <types.h>
#include <arch/io.h>
#include <device/pci_ops.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c
index 96fcefc..4b29e0f 100644
--- a/src/southbridge/intel/i82371eb/acpi_tables.c
+++ b/src/southbridge/intel/i82371eb/acpi_tables.c
@@ -2,8 +2,8 @@
/* This file is part of the coreboot project. */
#include <console/console.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include "i82371eb.h"
diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c
index db1071a..03bbdcc 100644
--- a/src/southbridge/intel/i82371eb/fadt.c
+++ b/src/southbridge/intel/i82371eb/fadt.c
@@ -16,7 +16,7 @@
*/
#include <string.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <device/device.h>
#include <device/pci.h>
#include <version.h>
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index bc492df..d191865 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -23,8 +23,8 @@
#include <pc80/mc146818rtc.h>
#include <arch/ioapic.h>
#if CONFIG(HAVE_ACPI_TABLES)
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#endif
#include "i82371eb.h"
#include "chip.h"
diff --git a/src/southbridge/intel/i82371eb/wakeup.c b/src/southbridge/intel/i82371eb/wakeup.c
index 2534333..45f0182 100644
--- a/src/southbridge/intel/i82371eb/wakeup.c
+++ b/src/southbridge/intel/i82371eb/wakeup.c
@@ -14,7 +14,7 @@
*/
#include <stdint.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/io.h>
#include <console/console.h>
#include "i82371eb.h"
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index 35a0bc2..0b54fe7 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -12,7 +12,7 @@
#ifndef I82801DX_H
#define I82801DX_H
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#if !defined(__ASSEMBLER__)
diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c
index c81dabe..c437cc8 100644
--- a/src/southbridge/intel/i82801dx/smi.c
+++ b/src/southbridge/intel/i82801dx/smi.c
@@ -5,7 +5,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <console/console.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/io.h>
#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index e54f2bd..3e9493f 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -12,9 +12,9 @@
#include <arch/io.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/smm.h>
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <string.h>
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 8765cc1..072f60b 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -12,9 +12,9 @@
#include <arch/io.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/smm.h>
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <cbmem.h>
#include <string.h>
#include "chip.h"
diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c
index 30be71f..6cf0c52 100644
--- a/src/southbridge/intel/i82801ix/smi.c
+++ b/src/southbridge/intel/i82801ix/smi.c
@@ -9,7 +9,7 @@
#include <console/console.h>
#include <arch/io.h>
#include <device/pci_ops.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <cpu/x86/smi_deprecated.h>
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 77a8f77..e2658b3 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -12,9 +12,9 @@
#include <arch/io.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/smm.h>
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <string.h>
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 4edf87e..0b0a9f2 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -13,9 +13,9 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <elog.h>
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <cbmem.h>
#include <string.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c
index c582048..1b2e016 100644
--- a/src/southbridge/intel/ibexpeak/madt.c
+++ b/src/southbridge/intel/ibexpeak/madt.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index ea641ee..bcdb17a 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -9,7 +9,7 @@
* not used unless the console loglevel is high enough.
*/
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <console/console.h>
#include <device/device.h>
#include <device/mmio.h>
diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h
index fc20660..7e8306c 100644
--- a/src/southbridge/intel/ibexpeak/pch.h
+++ b/src/southbridge/intel/ibexpeak/pch.h
@@ -4,7 +4,7 @@
#ifndef SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
#define SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
/* PCH types */
#define PCH_TYPE_CPT 0x1c /* CougarPoint */
diff --git a/src/southbridge/intel/lynxpoint/acpi.c b/src/southbridge/intel/lynxpoint/acpi.c
index 48e2a29..315fb65 100644
--- a/src/southbridge/intel/lynxpoint/acpi.c
+++ b/src/southbridge/intel/lynxpoint/acpi.c
@@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <cbmem.h>
#include <types.h>
#include <string.h>
diff --git a/src/southbridge/intel/lynxpoint/elog.c b/src/southbridge/intel/lynxpoint/elog.c
index d19250c..85d8950 100644
--- a/src/southbridge/intel/lynxpoint/elog.c
+++ b/src/southbridge/intel/lynxpoint/elog.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <arch/io.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index b5fb674..6db647c 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -11,14 +11,14 @@
#include <pc80/i8259.h>
#include <arch/io.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
#include <string.h>
#include "chip.h"
#include "nvs.h"
#include "pch.h"
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <southbridge/intel/common/rtc.h>
#include <southbridge/intel/common/spi.h>
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 4599c26..2c2c6ea 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -9,7 +9,7 @@
* not used unless the console loglevel is high enough.
*/
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index d583992..8707349 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -4,7 +4,7 @@
#ifndef SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H
#define SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#define CROS_GPIO_DEVICE_NAME "LynxPoint"