Change Geode GX2 to use the auto DRAM detect code from Geode LX.
Also, change the GX2 boards to use it.
Add a processor speed setting function in human readable MHz and remove
the useless and broken PLLMSR settings (the processor speed was hardcoded
to 366MHz in pll_reset.c).
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h
index eaaeca4..b89f7e6 100644
--- a/src/include/cpu/amd/gx2def.h
+++ b/src/include/cpu/amd/gx2def.h
@@ -413,6 +413,13 @@
#define AES_GLD_MSR_PM (MSR_AES + 0x2004)
#define AES_CONTROL (MSR_AES + 0x2006)
+/* from MC spec */
+#define MIN_MOD_BANKS 1
+#define MAX_MOD_BANKS 2
+#define MIN_DEV_BANKS 2
+#define MAX_DEV_BANKS 4
+#define MAX_COL_ADDR 17
+
/* more fun stuff */
#define BM 1 /* Base Mask - map power of 2 size aligned region */
#define BMO 2 /* BM with an offset */