This patch moves one of the CAR configs to the socket from the single
mainboard that uses it.
Signed-off-by: Warren Turkal <wt@penguintechs.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig
index 76cbb1f..1306656 100644
--- a/src/cpu/intel/socket_441/Kconfig
+++ b/src/cpu/intel/socket_441/Kconfig
@@ -1,5 +1,21 @@
config CPU_INTEL_SOCKET_441
bool
+
+if CPU_INTEL_SOCKET_441
+
+config SOCKET_SPECIFIC_OPTIONS # dummy
+ def_bool y
select CPU_INTEL_MODEL_106CX
select MMX
select SSE
+ select CACHE_AS_RAM
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xffdf8000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x8000
+
+endif # CPU_INTEL_SOCKET_441
diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index 1317df2..6db4359 100644
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -38,7 +38,6 @@
select HAVE_ACPI_TABLES
select HAVE_SMI_HANDLER
select BOARD_ROMSIZE_KB_512
- select CACHE_AS_RAM
select GFXUMA
select TINY_BOOTBLOCK
@@ -46,14 +45,6 @@
string
default intel/d945gclf
-config DCACHE_RAM_BASE
- hex
- default 0xffdf8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
-
config MAINBOARD_PART_NUMBER
string
default "D945GCLF"