diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 9ba47da..42cc7ce 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -53,4 +53,13 @@
 	  the board supports, despite what the chipset should be
 	  capable of.
 
+config CHECK_SLFRCS_ON_RESUME
+	def_bool n
+	help
+	  On some boards it may be neccessary to hard reset early
+	  during resume from S3 if the SLFRCS register indicates that
+	  a memory channel is not guaranteed to be in self-refresh.
+	  On other boards the check always creates a false positive,
+	  effectively making it impossible to resume.
+
 endif
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index a7fbaa4..d92c006 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -294,8 +294,8 @@
 	reg8 |= (1<<7);
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa2, reg8);
 
-	/* clear self refresh if not wake-up from suspend */
-	if (sysinfo->boot_path != 2) {
+	/* clear self refresh status if check is disabled or not a resume */
+	if (!CONFIG_CHECK_SLFRCS_ON_RESUME || sysinfo->boot_path != 2) {
 		MCHBAR8(0xf14) |= 3;
 	} else {
 		/* Validate self refresh config */