drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver

Now SOC code can select the require UDK support package for any
platform going forward with FSP2.0 model.

Change-Id: Ie6d1b9133892c59210a659ef0ad4b59ebf9f1e45
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/23426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 864b3a1..7f3d165 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -1,7 +1,7 @@
 #
 # This file is part of the coreboot project.
 #
-# Copyright (C) 2015-2016 Intel Corp.
+# Copyright (C) 2015-2018 Intel Corp.
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -15,7 +15,7 @@
 
 config PLATFORM_USES_FSP2_0
 	bool
-	select UDK_2015_BINDING
+	default n
 	help
 	  Include FSP 2.0 wrappers and functionality
 
diff --git a/src/mainboard/intel/galileo/Kconfig b/src/mainboard/intel/galileo/Kconfig
index 12cbb6c..edea30f 100644
--- a/src/mainboard/intel/galileo/Kconfig
+++ b/src/mainboard/intel/galileo/Kconfig
@@ -1,7 +1,7 @@
 ##
 ## This file is part of the coreboot project.
 ##
-## Copyright (C) 2015-2017 Intel Corp.
+## Copyright (C) 2015-2018 Intel Corp.
 ##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
@@ -58,6 +58,7 @@
 config FSP_VERSION_2_0
 	bool "FSP 2.0"
 	select PLATFORM_USES_FSP2_0
+	select UDK_2015_BINDING
 	select POSTCAR_STAGE
 	help
 	  Use FSP 2.0 binary
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index bd6f645..b7f2dc9 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -98,6 +98,8 @@
 	select TSC_MONOTONIC_TIMER
 	select HAVE_MONOTONIC_TIMER
 	select PLATFORM_USES_FSP2_0
+	select UDK_2015_BINDING if !SOC_INTEL_GLK
+	select UDK_2017_BINDING if SOC_INTEL_GLK
 	select HAVE_HARD_RESET
 	select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
 	select HAVE_FSP_GOP
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 8eee6f4..a131ad4 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -75,6 +75,7 @@
 	select TSC_CONSTANT_RATE
 	select TSC_MONOTONIC_TIMER
 	select UDELAY_TSC
+	select UDK_2017_BINDING
 
 config UART_DEBUG
 	bool "Enable UART debug port."
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index cb13f3f..8d9a550 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -1,7 +1,7 @@
 ##
 ## This file is part of the coreboot project.
 ##
-## Copyright (C) 2014 - 2017 Intel Corporation.
+## Copyright (C) 2014 - 2018 Intel Corporation.
 ##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
@@ -50,6 +50,7 @@
 	select TSC_MONOTONIC_TIMER
 	select TSC_SYNC_MFENCE
 	select UDELAY_TSC
+	select UDK_2015_BINDING
 
 config FSP_T_ADDR
 	hex "Intel FSP-T (temp ram init) binary location"
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 794b8e9..a486bd6 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -104,6 +104,7 @@
 	def_bool y
 	depends on MAINBOARD_USES_FSP2_0
 	select PLATFORM_USES_FSP2_0
+	select UDK_2015_BINDING
 	select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
 	select POSTCAR_CONSOLE
 	select POSTCAR_STAGE