| commit | 742df5ad34c0ad4d2bae2373ace6440c4cb6b792 | [log] [tgz] |
|---|---|---|
| author | Arthur Heymans <arthur@aheymans.xyz> | Mon Jun 03 16:24:41 2019 +0200 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Wed Jun 05 11:39:14 2019 +0000 |
| tree | 71763565a7854435392d238d922b073563da7f02 | |
| parent | fbf380abac431b3b93ea180ee928b6b8f8dd8182 [diff] [blame] |
sb/intel/i82801gx: Include chip.h directly Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33171 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index 3e5dbc3..0946a9a 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -19,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include "chip.h" #include "i82801gx.h" /* Low Power variant has 6 root ports. */