mb/intel/tglrvp: Enable Pcie WWAN m.2
Enables Pcie M.2 support for WWAN and disable M.2 USB.
RP4 is already on and PcieRpEnable[3] is enabled. Clock source 2 is already
configured. Added missing gpio configuration.
BUG=none
TEST=Boot to OS, check WWAN functionality
Change-Id: Ie9b7915062b2ef65d881d478e64322c0b8765614
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45828
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index b46a1cf..25c2293 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -20,7 +20,7 @@
register "SmbusEnable" = "1"
register "usb2_ports[0]" = "USB2_PORT_MID(OC3)" # Type-C Port1
- register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN
+ register "usb2_ports[1]" = "USB2_PORT_EMPTY" # M.2 WWAN
register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # M.2 Bluetooth, USB3/2 Type A Port1
register "usb2_ports[3]" = "USB2_PORT_MID(OC3)" # USB3/2 Type A Port 1
register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # Type-C Port2