soc/intel/broadwell/pch: Prepare to drop `gpio.h`
Use `lp_gpio.h` from Lynxpoint instead. Subsequent commits will update
the mainboards and then drop all GPIO code from Broadwell.
Tested with BUILD_TIMELESS=1, Google Tidus remains identical.
Change-Id: Idef89037c2ca781ac3e921abb4b3dc3f7c4b3b5f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50079
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/broadwell/pch/pcie.c b/src/soc/intel/broadwell/pch/pcie.c
index 141fc14..7f16cb4 100644
--- a/src/soc/intel/broadwell/pch/pcie.c
+++ b/src/soc/intel/broadwell/pch/pcie.c
@@ -8,13 +8,13 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <soc/gpio.h>
#include <soc/lpc.h>
#include <soc/iobp.h>
#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <soc/rcba.h>
#include <soc/intel/broadwell/pch/chip.h>
+#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include <delay.h>
/* Low Power variant has 6 root ports. */