sb/intel/bd82x6x/pcie.c: Move `pch_pcie_acpi_name` up
The ASSERT() macro depends on the line number, so changing the line it
appears in breaks reproducibility testing using BUILD_TIMELESS=1.
Work around this problem by placing the `pch_pcie_acpi_name` function,
which contains this macro, at the beginning of the file. This allows
refactoring the rest of the code without affecting the ASSERT() macro.
Change-Id: I2e0432ec9ae6c7d033fc7495afb3a71fe7e77729
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 5bc3412..ff881ac 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -13,6 +13,26 @@
#include "chip.h"
#include "pch.h"
+static const char *pch_pcie_acpi_name(const struct device *dev)
+{
+ ASSERT(dev);
+
+ if (PCI_SLOT(dev->path.pci.devfn) == 0x1c) {
+ static const char *names[] = { "RP01",
+ "RP02",
+ "RP03",
+ "RP04",
+ "RP05",
+ "RP06",
+ "RP07",
+ "RP08"};
+
+ return names[PCI_FUNC(dev->path.pci.devfn)];
+ }
+
+ return NULL;
+}
+
static void pch_pcie_pm_early(struct device *dev)
{
u16 link_width_p0, link_width_p4;
@@ -272,26 +292,6 @@
pch_pcie_pm_late(dev);
}
-static const char *pch_pcie_acpi_name(const struct device *dev)
-{
- ASSERT(dev);
-
- if (PCI_SLOT(dev->path.pci.devfn) == 0x1c) {
- static const char *names[] = { "RP01",
- "RP02",
- "RP03",
- "RP04",
- "RP05",
- "RP06",
- "RP07",
- "RP08"};
-
- return names[PCI_FUNC(dev->path.pci.devfn)];
- }
-
- return NULL;
-}
-
static struct device_operations device_ops = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,